ARM: dts: rockchip: Add rv1106 nofastae dtsi

Signed-off-by: Weiwen Chen <cww@rock-chips.com>
Change-Id: Id240c4238410a18dff6c14c129063ffbd10b7e37

arch/arm/boot/dts/rv1106-tb-nofastae-emmc.dtsi

@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+#include "rv1106-tb-nofastae.dtsi"
+
+/ {
+	reserved-memory {
+		mmc_ecsd: mmc@3f000 {
+			reg = <0x3f000 0x00001000>;
+		};
+
+		mmc_idmac: mmc@100000 {
+			reg = <0x00100000 0x00100000>;
+		};
+	};
+
+	thunder_boot_mmc: thunder-boot-mmc {
+		compatible = "rockchip,thunder-boot-mmc";
+		reg = <0xffa90000 0x4000>;
+		memory-region-src = <&ramdisk_c>;
+		memory-region-dst = <&ramdisk_r>;
+		memory-region-idmac = <&mmc_idmac>;
+	};
+};
+
+&emmc {
+	memory-region-ecsd = <&mmc_ecsd>;
+	post-power-on-delay-ms = <0>;
+};

arch/arm/boot/dts/rv1106-tb-nofastae-spi-nor.dtsi

@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+#include "rv1106-tb-nofastae.dtsi"
+
+/ {
+	thunder_boot_spi_nor: thunder-boot-spi-nor {
+		compatible = "rockchip,thunder-boot-sfc";
+		reg = <0xffac0000 0x4000>;
+		memory-region-src = <&ramdisk_c>;
+		memory-region-dst = <&ramdisk_r>;
+	};
+};
+
+&emmc {
+	status = "disabled";
+};

arch/arm/boot/dts/rv1106-tb-nofastae.dtsi

@@ -0,0 +1,35 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+/ {
+	memory: memory {
+		device_type = "memory";
+		reg = <0x00000000 0x08000000>;
+	};
+
+	ramdisk: ramdisk {
+		compatible = "rockchip,ramdisk";
+		memory-region = <&ramdisk_r>;
+	};
+
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		ramdisk_r: ramdisk_r {
+			reg = <0x800000 (10 * 0x00100000)>;
+		};
+
+		ramdisk_c: ramdisk_c {
+			reg = <0x1200000 (5 * 0x00100000)>;
+		};
+	};
+};
+
+&hw_decompress {
+	status = "okay";
+	memory-region = <&ramdisk_c>;
+};