arm64: dts: rockchip: rk3308: add CPU_SLEEP

Change-Id: I99c4209bdac9fbc9af33fa883b796852d0c41e40
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
This commit is contained in:
XiaoDong Huang
2018-04-16 19:45:44 +08:00
committed by Tao Huang
parent fefcebe591
commit 193ebe85ae

View File

@@ -49,6 +49,7 @@
#cooling-cells = <2>;
dynamic-power-coefficient = <90>;
operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
cpu1: cpu@1 {
@@ -57,6 +58,7 @@
reg = <0x0 0x1>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
cpu2: cpu@2 {
@@ -65,6 +67,7 @@
reg = <0x0 0x2>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
cpu3: cpu@3 {
@@ -73,6 +76,20 @@
reg = <0x0 0x3>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
cpu-idle-states = <&CPU_SLEEP>;
};
idle-states {
entry-method = "psci";
CPU_SLEEP: cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x0010000>;
entry-latency-us = <120>;
exit-latency-us = <250>;
min-residency-us = <900>;
};
};
};
@@ -557,6 +574,14 @@
status = "disabled";
};
rktimer: rktimer@ff1a0000 {
compatible = "rockchip,rk3288-timer";
reg = <0x0 0xff1a0000 0x0 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
clock-names = "pclk", "timer";
};
saradc: saradc@ff1e0000 {
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff1e0000 0x0 0x100>;