mirror of
https://github.com/hardkernel/linux.git
synced 2026-03-24 19:40:21 +09:00
Merge 5.15.146 into android14-5.15-lts
Changes in 5.15.146 ARM: dts: dra7: Fix DRA7 L3 NoC node register size ARM: OMAP2+: Fix null pointer dereference and memory leak in omap_soc_device_init reset: Fix crash when freeing non-existent optional resets s390/vx: fix save/restore of fpu kernel context wifi: iwlwifi: pcie: add another missing bh-disable for rxq->lock wifi: mac80211: mesh_plink: fix matches_local logic Revert "net/mlx5e: fix double free of encap_header in update funcs" Revert "net/mlx5e: fix double free of encap_header" net/mlx5e: Fix slab-out-of-bounds in mlx5_query_nic_vport_mac_list() net/mlx5e: fix a potential double-free in fs_udp_create_groups net/mlx5: Fix fw tracer first block check net/mlx5e: Correct snprintf truncation handling for fw_version buffer used by representors net: sched: ife: fix potential use-after-free ethernet: atheros: fix a memleak in atl1e_setup_ring_resources net/rose: fix races in rose_kill_by_device() net: mana: select PAGE_POOL net: check vlan filter feature in vlan_vids_add_by_dev() and vlan_vids_del_by_dev() afs: Fix the dynamic root's d_delete to always delete unused dentries afs: Fix dynamic root lookup DNS check net: check dev->gso_max_size in gso_features_check() keys, dns: Allow key types (eg. DNS) to be reclaimed immediately on expiry afs: Fix overwriting of result of DNS query afs: Use refcount_t rather than atomic_t afs: Fix use-after-free due to get/remove race in volume tree ASoC: hdmi-codec: fix missing report for jack initial status i2c: aspeed: Handle the coalesced stop conditions with the start conditions. pinctrl: at91-pio4: use dedicated lock class for IRQ gpiolib: cdev: add gpio_device locking wrapper around gpio_ioctl() ksmbd: fix wrong name of SMB2_CREATE_ALLOCATION_SIZE drm/i915/mtl: limit second scaler vertical scaling in ver >= 14 drm/i915: Relocate intel_atomic_setup_scalers() drm/i915: Fix intel_atomic_setup_scalers() plane_state handling smb: client: fix NULL deref in asn1_ber_decoder() smb: client: fix OOB in smb2_query_reparse_point() interconnect: Treat xlate() returning NULL node as an error iio: imu: inv_mpu6050: fix an error code problem in inv_mpu6050_read_raw Input: ipaq-micro-keys - add error handling for devm_kmemdup scsi: bnx2fc: Fix skb double free in bnx2fc_rcv() iio: common: ms_sensors: ms_sensors_i2c: fix humidity conversion time table iio: adc: ti_am335x_adc: Fix return value check of tiadc_request_dma() iio: triggered-buffer: prevent possible freeing of wrong buffer ALSA: usb-audio: Increase delay in MOTU M quirk wifi: cfg80211: Add my certificate wifi: cfg80211: fix certs build to not depend on file order USB: serial: ftdi_sio: update Actisense PIDs constant names USB: serial: option: add Quectel EG912Y module support USB: serial: option: add Foxconn T99W265 with new baseline USB: serial: option: add Quectel RM500Q R13 firmware support Bluetooth: hci_event: Fix not checking if HCI_OP_INQUIRY has been sent Bluetooth: L2CAP: Send reject on command corrupted request Bluetooth: MGMT/SMP: Fix address type when using SMP over BREDR/LE Input: soc_button_array - add mapping for airplane mode button net: 9p: avoid freeing uninit memory in p9pdu_vreadf net: rfkill: gpio: set GPIO direction net: ks8851: Fix TX stall caused by TX buffer overrun dt-bindings: nvmem: mxs-ocotp: Document fsl,ocotp scsi: core: Always send batch on reset or error handling command tracing / synthetic: Disable events after testing in synth_event_gen_test_init() bus: ti-sysc: Flush posted write only after srst_udelay gpio: dwapb: mask/unmask IRQ when disable/enale it lib/vsprintf: Fix %pfwf when current node refcount == 0 KVM: arm64: vgic: Force vcpu vgic teardown on vcpu destroy x86/alternatives: Sync core before enabling interrupts fuse: share lookup state between submount and its parent ksmbd: have a dependency on cifs ARC4 ksmbd: set epoch in create context v2 lease ksmbd: set v2 lease capability ksmbd: downgrade RWH lease caching state to RH for directory ksmbd: send v2 lease break notification for directory ksmbd: lazy v2 lease break on smb2_write() ksmbd: avoid duplicate opinfo_put() call on error of smb21_lease_break_ack() ksmbd: fix wrong allocation size update in smb2_open() ARM: dts: Fix occasional boot hang for am3 usb usb: fotg210-hcd: delete an incorrect bounds test ethernet: constify references to netdev->dev_addr in drivers net: usb: ax88179_178a: clean up pm calls net: usb: ax88179_178a: wol optimizations net: usb: ax88179_178a: avoid failed operations when device is disconnected device property: Add const qualifier to device_get_match_data() parameter spi: Introduce spi_get_device_match_data() helper iio: imu: adis16475: add spi_device_id table smb: client: fix OOB in SMB2_query_info_init() smb: client: fix OOB in smbCalcSize() Bluetooth: af_bluetooth: Fix Use-After-Free in bt_sock_recvmsg mm/filemap: avoid buffered read/write race to read inconsistent data ring-buffer: Fix wake ups when buffer_percent is set to 100 tracing: Fix blocked reader of snapshot buffer ring-buffer: Remove useless update to write_stamp in rb_try_to_discard() ksmbd: fix slab-out-of-bounds in smb_strndup_from_utf16() netfilter: nf_tables: skip set commit for deleted/destroyed sets ring-buffer: Fix slowpath of interrupted event dm-integrity: don't modify bio's immutable bio_vec in integrity_metadata() device property: Allow const parameter to dev_fwnode() bpf: Fix prog_array_map_poke_run map poke update Linux 5.15.146 Change-Id: I18211d5ac496f9668d6c9db49ab1e5ca4f23cbcc Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
@@ -14,9 +14,11 @@ allOf:
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properties:
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compatible:
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enum:
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- fsl,imx23-ocotp
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- fsl,imx28-ocotp
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items:
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- enum:
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- fsl,imx23-ocotp
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- fsl,imx28-ocotp
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- const: fsl,ocotp
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"#address-cells":
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const: 1
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@@ -40,7 +42,7 @@ additionalProperties: false
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examples:
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- |
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ocotp: efuse@8002c000 {
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compatible = "fsl,imx28-ocotp";
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compatible = "fsl,imx28-ocotp", "fsl,ocotp";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x8002c000 0x2000>;
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2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 15
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SUBLEVEL = 145
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SUBLEVEL = 146
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EXTRAVERSION =
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NAME = Trick or Treat
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@@ -349,6 +349,7 @@
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>,
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<SYSC_IDLE_SMART_WKUP>;
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ti,sysc-delay-us = <2>;
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clocks = <&l3s_clkctrl AM3_L3S_USB_OTG_HS_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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@@ -144,7 +144,7 @@
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l3-noc@44000000 {
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compatible = "ti,dra7-l3-noc";
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reg = <0x44000000 0x1000>,
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reg = <0x44000000 0x1000000>,
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<0x45000000 0x1000>;
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interrupts-extended = <&crossbar_mpu GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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<&wakeupgen GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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@@ -793,11 +793,16 @@ void __init omap_soc_device_init(void)
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soc_dev_attr->machine = soc_name;
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soc_dev_attr->family = omap_get_family();
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if (!soc_dev_attr->family) {
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kfree(soc_dev_attr);
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return;
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}
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soc_dev_attr->revision = soc_rev;
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soc_dev_attr->custom_attr_group = omap_soc_groups[0];
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soc_dev = soc_device_register(soc_dev_attr);
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if (IS_ERR(soc_dev)) {
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kfree(soc_dev_attr->family);
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kfree(soc_dev_attr);
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return;
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}
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@@ -497,7 +497,7 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
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kvm_timer_vcpu_terminate(vcpu);
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kvm_pmu_vcpu_destroy(vcpu);
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kvm_vgic_vcpu_destroy(vcpu);
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kvm_arm_vcpu_destroy(vcpu);
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}
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@@ -379,7 +379,10 @@ void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
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vgic_flush_pending_lpis(vcpu);
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INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
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vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
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if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
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vgic_unregister_redist_iodev(vcpu);
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vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
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}
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}
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static void __kvm_vgic_destroy(struct kvm *kvm)
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@@ -820,7 +820,7 @@ out_unlock:
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return ret;
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}
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static void vgic_unregister_redist_iodev(struct kvm_vcpu *vcpu)
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void vgic_unregister_redist_iodev(struct kvm_vcpu *vcpu)
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{
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struct vgic_io_device *rd_dev = &vcpu->arch.vgic_cpu.rd_iodev;
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@@ -239,6 +239,7 @@ int vgic_v3_lpi_sync_pending_status(struct kvm *kvm, struct vgic_irq *irq);
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int vgic_v3_save_pending_tables(struct kvm *kvm);
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int vgic_v3_set_redist_base(struct kvm *kvm, u32 index, u64 addr, u32 count);
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int vgic_register_redist_iodev(struct kvm_vcpu *vcpu);
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void vgic_unregister_redist_iodev(struct kvm_vcpu *vcpu);
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bool vgic_v3_check_base(struct kvm *kvm);
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void vgic_v3_load(struct kvm_vcpu *vcpu);
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@@ -78,7 +78,7 @@ static inline int test_fp_ctl(u32 fpc)
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#define KERNEL_VXR_HIGH (KERNEL_VXR_V16V23|KERNEL_VXR_V24V31)
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#define KERNEL_VXR (KERNEL_VXR_LOW|KERNEL_VXR_HIGH)
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#define KERNEL_FPR (KERNEL_FPC|KERNEL_VXR_V0V7)
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#define KERNEL_FPR (KERNEL_FPC|KERNEL_VXR_LOW)
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struct kernel_fpu;
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@@ -963,8 +963,8 @@ void __init_or_module text_poke_early(void *addr, const void *opcode,
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} else {
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local_irq_save(flags);
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memcpy(addr, opcode, len);
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local_irq_restore(flags);
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sync_core();
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local_irq_restore(flags);
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/*
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* Could also do a CLFLUSH here to speed up CPU recovery; but
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@@ -2403,3 +2403,49 @@ bool bpf_jit_supports_kfunc_call(void)
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{
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return true;
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}
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void bpf_arch_poke_desc_update(struct bpf_jit_poke_descriptor *poke,
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struct bpf_prog *new, struct bpf_prog *old)
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{
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u8 *old_addr, *new_addr, *old_bypass_addr;
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int ret;
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old_bypass_addr = old ? NULL : poke->bypass_addr;
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old_addr = old ? (u8 *)old->bpf_func + poke->adj_off : NULL;
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new_addr = new ? (u8 *)new->bpf_func + poke->adj_off : NULL;
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/*
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* On program loading or teardown, the program's kallsym entry
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* might not be in place, so we use __bpf_arch_text_poke to skip
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* the kallsyms check.
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*/
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if (new) {
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ret = __bpf_arch_text_poke(poke->tailcall_target,
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BPF_MOD_JUMP,
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old_addr, new_addr, true);
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BUG_ON(ret < 0);
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if (!old) {
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ret = __bpf_arch_text_poke(poke->tailcall_bypass,
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BPF_MOD_JUMP,
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poke->bypass_addr,
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NULL, true);
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BUG_ON(ret < 0);
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}
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} else {
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ret = __bpf_arch_text_poke(poke->tailcall_bypass,
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BPF_MOD_JUMP,
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old_bypass_addr,
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poke->bypass_addr, true);
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BUG_ON(ret < 0);
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/* let other CPUs finish the execution of program
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* so that it will not possible to expose them
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* to invalid nop, stack unwind, nop state
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*/
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if (!ret)
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synchronize_rcu();
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ret = __bpf_arch_text_poke(poke->tailcall_target,
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BPF_MOD_JUMP,
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old_addr, NULL, true);
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BUG_ON(ret < 0);
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}
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}
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@@ -18,12 +18,19 @@
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#include <linux/etherdevice.h>
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#include <linux/phy.h>
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struct fwnode_handle *dev_fwnode(struct device *dev)
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struct fwnode_handle *__dev_fwnode(struct device *dev)
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{
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return IS_ENABLED(CONFIG_OF) && dev->of_node ?
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of_fwnode_handle(dev->of_node) : dev->fwnode;
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}
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EXPORT_SYMBOL_GPL(dev_fwnode);
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EXPORT_SYMBOL_GPL(__dev_fwnode);
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const struct fwnode_handle *__dev_fwnode_const(const struct device *dev)
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{
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return IS_ENABLED(CONFIG_OF) && dev->of_node ?
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of_fwnode_handle(dev->of_node) : dev->fwnode;
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}
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EXPORT_SYMBOL_GPL(__dev_fwnode_const);
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/**
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* device_property_present - check if a property of a device is present
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@@ -1281,7 +1288,7 @@ int fwnode_graph_parse_endpoint(const struct fwnode_handle *fwnode,
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}
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EXPORT_SYMBOL(fwnode_graph_parse_endpoint);
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const void *device_get_match_data(struct device *dev)
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const void *device_get_match_data(const struct device *dev)
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{
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return fwnode_call_ptr_op(dev_fwnode(dev), device_get_match_data, dev);
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}
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@@ -2104,13 +2104,23 @@ static int sysc_reset(struct sysc *ddata)
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sysc_val = sysc_read_sysconfig(ddata);
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sysc_val |= sysc_mask;
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sysc_write(ddata, sysc_offset, sysc_val);
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/* Flush posted write */
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/*
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* Some devices need a delay before reading registers
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* after reset. Presumably a srst_udelay is not needed
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* for devices that use a rstctrl register reset.
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*/
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if (ddata->cfg.srst_udelay)
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fsleep(ddata->cfg.srst_udelay);
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/*
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* Flush posted write. For devices needing srst_udelay
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* this should trigger an interconnect error if the
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* srst_udelay value is needed but not configured.
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*/
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sysc_val = sysc_read_sysconfig(ddata);
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}
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if (ddata->cfg.srst_udelay)
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fsleep(ddata->cfg.srst_udelay);
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if (ddata->post_reset_quirk)
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ddata->post_reset_quirk(ddata);
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@@ -277,13 +277,15 @@ static void dwapb_irq_enable(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
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val = dwapb_read(gpio, GPIO_INTEN);
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val |= BIT(irqd_to_hwirq(d));
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val = dwapb_read(gpio, GPIO_INTEN) | BIT(hwirq);
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dwapb_write(gpio, GPIO_INTEN, val);
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val = dwapb_read(gpio, GPIO_INTMASK) & ~BIT(hwirq);
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dwapb_write(gpio, GPIO_INTMASK, val);
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raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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@@ -291,12 +293,14 @@ static void dwapb_irq_disable(struct irq_data *d)
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{
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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irq_hw_number_t hwirq = irqd_to_hwirq(d);
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unsigned long flags;
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u32 val;
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raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
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val = dwapb_read(gpio, GPIO_INTEN);
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val &= ~BIT(irqd_to_hwirq(d));
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val = dwapb_read(gpio, GPIO_INTMASK) | BIT(hwirq);
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dwapb_write(gpio, GPIO_INTMASK, val);
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val = dwapb_read(gpio, GPIO_INTEN) & ~BIT(hwirq);
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dwapb_write(gpio, GPIO_INTEN, val);
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raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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@@ -2224,10 +2224,7 @@ static int lineinfo_unwatch(struct gpio_chardev_data *cdev, void __user *ip)
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return 0;
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}
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/*
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* gpio_ioctl() - ioctl handler for the GPIO chardev
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*/
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static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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static long gpio_ioctl_unlocked(struct file *file, unsigned int cmd, unsigned long arg)
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{
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struct gpio_chardev_data *cdev = file->private_data;
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struct gpio_device *gdev = cdev->gdev;
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@@ -2264,6 +2261,17 @@ static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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}
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}
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|
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/*
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* gpio_ioctl() - ioctl handler for the GPIO chardev
|
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*/
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static long gpio_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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struct gpio_chardev_data *cdev = file->private_data;
|
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|
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return call_ioctl_locked(file, cmd, arg, cdev->gdev,
|
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gpio_ioctl_unlocked);
|
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}
|
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|
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#ifdef CONFIG_COMPAT
|
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static long gpio_ioctl_compat(struct file *file, unsigned int cmd,
|
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unsigned long arg)
|
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|
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@@ -40,6 +40,7 @@
|
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#include "intel_global_state.h"
|
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#include "intel_hdcp.h"
|
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#include "intel_psr.h"
|
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#include "intel_fb.h"
|
||||
#include "skl_universal_plane.h"
|
||||
|
||||
/**
|
||||
@@ -310,198 +311,6 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
|
||||
kfree(crtc_state);
|
||||
}
|
||||
|
||||
static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
|
||||
int num_scalers_need, struct intel_crtc *intel_crtc,
|
||||
const char *name, int idx,
|
||||
struct intel_plane_state *plane_state,
|
||||
int *scaler_id)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
|
||||
int j;
|
||||
u32 mode;
|
||||
|
||||
if (*scaler_id < 0) {
|
||||
/* find a free scaler */
|
||||
for (j = 0; j < intel_crtc->num_scalers; j++) {
|
||||
if (scaler_state->scalers[j].in_use)
|
||||
continue;
|
||||
|
||||
*scaler_id = j;
|
||||
scaler_state->scalers[*scaler_id].in_use = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (drm_WARN(&dev_priv->drm, *scaler_id < 0,
|
||||
"Cannot find scaler for %s:%d\n", name, idx))
|
||||
return;
|
||||
|
||||
/* set scaler mode */
|
||||
if (plane_state && plane_state->hw.fb &&
|
||||
plane_state->hw.fb->format->is_yuv &&
|
||||
plane_state->hw.fb->format->num_planes > 1) {
|
||||
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
|
||||
if (DISPLAY_VER(dev_priv) == 9) {
|
||||
mode = SKL_PS_SCALER_MODE_NV12;
|
||||
} else if (icl_is_hdr_plane(dev_priv, plane->id)) {
|
||||
/*
|
||||
* On gen11+'s HDR planes we only use the scaler for
|
||||
* scaling. They have a dedicated chroma upsampler, so
|
||||
* we don't need the scaler to upsample the UV plane.
|
||||
*/
|
||||
mode = PS_SCALER_MODE_NORMAL;
|
||||
} else {
|
||||
struct intel_plane *linked =
|
||||
plane_state->planar_linked_plane;
|
||||
|
||||
mode = PS_SCALER_MODE_PLANAR;
|
||||
|
||||
if (linked)
|
||||
mode |= PS_PLANE_Y_SEL(linked->id);
|
||||
}
|
||||
} else if (DISPLAY_VER(dev_priv) >= 10) {
|
||||
mode = PS_SCALER_MODE_NORMAL;
|
||||
} else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
|
||||
/*
|
||||
* when only 1 scaler is in use on a pipe with 2 scalers
|
||||
* scaler 0 operates in high quality (HQ) mode.
|
||||
* In this case use scaler 0 to take advantage of HQ mode
|
||||
*/
|
||||
scaler_state->scalers[*scaler_id].in_use = 0;
|
||||
*scaler_id = 0;
|
||||
scaler_state->scalers[0].in_use = 1;
|
||||
mode = SKL_PS_SCALER_MODE_HQ;
|
||||
} else {
|
||||
mode = SKL_PS_SCALER_MODE_DYN;
|
||||
}
|
||||
|
||||
drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n",
|
||||
intel_crtc->pipe, *scaler_id, name, idx);
|
||||
scaler_state->scalers[*scaler_id].mode = mode;
|
||||
}
|
||||
|
||||
/**
|
||||
* intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
|
||||
* @dev_priv: i915 device
|
||||
* @intel_crtc: intel crtc
|
||||
* @crtc_state: incoming crtc_state to validate and setup scalers
|
||||
*
|
||||
* This function sets up scalers based on staged scaling requests for
|
||||
* a @crtc and its planes. It is called from crtc level check path. If request
|
||||
* is a supportable request, it attaches scalers to requested planes and crtc.
|
||||
*
|
||||
* This function takes into account the current scaler(s) in use by any planes
|
||||
* not being part of this atomic state
|
||||
*
|
||||
* Returns:
|
||||
* 0 - scalers were setup succesfully
|
||||
* error code - otherwise
|
||||
*/
|
||||
int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
|
||||
struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_state *crtc_state)
|
||||
{
|
||||
struct drm_plane *plane = NULL;
|
||||
struct intel_plane *intel_plane;
|
||||
struct intel_plane_state *plane_state = NULL;
|
||||
struct intel_crtc_scaler_state *scaler_state =
|
||||
&crtc_state->scaler_state;
|
||||
struct drm_atomic_state *drm_state = crtc_state->uapi.state;
|
||||
struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
|
||||
int num_scalers_need;
|
||||
int i;
|
||||
|
||||
num_scalers_need = hweight32(scaler_state->scaler_users);
|
||||
|
||||
/*
|
||||
* High level flow:
|
||||
* - staged scaler requests are already in scaler_state->scaler_users
|
||||
* - check whether staged scaling requests can be supported
|
||||
* - add planes using scalers that aren't in current transaction
|
||||
* - assign scalers to requested users
|
||||
* - as part of plane commit, scalers will be committed
|
||||
* (i.e., either attached or detached) to respective planes in hw
|
||||
* - as part of crtc_commit, scaler will be either attached or detached
|
||||
* to crtc in hw
|
||||
*/
|
||||
|
||||
/* fail if required scalers > available scalers */
|
||||
if (num_scalers_need > intel_crtc->num_scalers){
|
||||
drm_dbg_kms(&dev_priv->drm,
|
||||
"Too many scaling requests %d > %d\n",
|
||||
num_scalers_need, intel_crtc->num_scalers);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* walkthrough scaler_users bits and start assigning scalers */
|
||||
for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
|
||||
int *scaler_id;
|
||||
const char *name;
|
||||
int idx;
|
||||
|
||||
/* skip if scaler not required */
|
||||
if (!(scaler_state->scaler_users & (1 << i)))
|
||||
continue;
|
||||
|
||||
if (i == SKL_CRTC_INDEX) {
|
||||
name = "CRTC";
|
||||
idx = intel_crtc->base.base.id;
|
||||
|
||||
/* panel fitter case: assign as a crtc scaler */
|
||||
scaler_id = &scaler_state->scaler_id;
|
||||
} else {
|
||||
name = "PLANE";
|
||||
|
||||
/* plane scaler case: assign as a plane scaler */
|
||||
/* find the plane that set the bit as scaler_user */
|
||||
plane = drm_state->planes[i].ptr;
|
||||
|
||||
/*
|
||||
* to enable/disable hq mode, add planes that are using scaler
|
||||
* into this transaction
|
||||
*/
|
||||
if (!plane) {
|
||||
struct drm_plane_state *state;
|
||||
|
||||
/*
|
||||
* GLK+ scalers don't have a HQ mode so it
|
||||
* isn't necessary to change between HQ and dyn mode
|
||||
* on those platforms.
|
||||
*/
|
||||
if (DISPLAY_VER(dev_priv) >= 10)
|
||||
continue;
|
||||
|
||||
plane = drm_plane_from_index(&dev_priv->drm, i);
|
||||
state = drm_atomic_get_plane_state(drm_state, plane);
|
||||
if (IS_ERR(state)) {
|
||||
drm_dbg_kms(&dev_priv->drm,
|
||||
"Failed to add [PLANE:%d] to drm_state\n",
|
||||
plane->base.id);
|
||||
return PTR_ERR(state);
|
||||
}
|
||||
}
|
||||
|
||||
intel_plane = to_intel_plane(plane);
|
||||
idx = plane->base.id;
|
||||
|
||||
/* plane on different crtc cannot be a scaler user of this crtc */
|
||||
if (drm_WARN_ON(&dev_priv->drm,
|
||||
intel_plane->pipe != intel_crtc->pipe))
|
||||
continue;
|
||||
|
||||
plane_state = intel_atomic_get_new_plane_state(intel_state,
|
||||
intel_plane);
|
||||
scaler_id = &plane_state->scaler_id;
|
||||
}
|
||||
|
||||
intel_atomic_setup_scaler(scaler_state, num_scalers_need,
|
||||
intel_crtc, name, idx,
|
||||
plane_state, scaler_id);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct drm_atomic_state *
|
||||
intel_atomic_state_alloc(struct drm_device *dev)
|
||||
{
|
||||
|
||||
@@ -54,8 +54,4 @@ struct intel_crtc_state *
|
||||
intel_atomic_get_crtc_state(struct drm_atomic_state *state,
|
||||
struct intel_crtc *crtc);
|
||||
|
||||
int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
|
||||
struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_state *crtc_state);
|
||||
|
||||
#endif /* __INTEL_ATOMIC_H__ */
|
||||
|
||||
@@ -294,6 +294,263 @@ int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
|
||||
int num_scalers_need, struct intel_crtc *intel_crtc,
|
||||
const char *name, int idx,
|
||||
struct intel_plane_state *plane_state,
|
||||
int *scaler_id)
|
||||
{
|
||||
struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
|
||||
int j;
|
||||
u32 mode;
|
||||
|
||||
if (*scaler_id < 0) {
|
||||
/* find a free scaler */
|
||||
for (j = 0; j < intel_crtc->num_scalers; j++) {
|
||||
if (scaler_state->scalers[j].in_use)
|
||||
continue;
|
||||
|
||||
*scaler_id = j;
|
||||
scaler_state->scalers[*scaler_id].in_use = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (drm_WARN(&dev_priv->drm, *scaler_id < 0,
|
||||
"Cannot find scaler for %s:%d\n", name, idx))
|
||||
return -EINVAL;
|
||||
|
||||
/* set scaler mode */
|
||||
if (plane_state && plane_state->hw.fb &&
|
||||
plane_state->hw.fb->format->is_yuv &&
|
||||
plane_state->hw.fb->format->num_planes > 1) {
|
||||
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
|
||||
|
||||
if (DISPLAY_VER(dev_priv) == 9) {
|
||||
mode = SKL_PS_SCALER_MODE_NV12;
|
||||
} else if (icl_is_hdr_plane(dev_priv, plane->id)) {
|
||||
/*
|
||||
* On gen11+'s HDR planes we only use the scaler for
|
||||
* scaling. They have a dedicated chroma upsampler, so
|
||||
* we don't need the scaler to upsample the UV plane.
|
||||
*/
|
||||
mode = PS_SCALER_MODE_NORMAL;
|
||||
} else {
|
||||
struct intel_plane *linked =
|
||||
plane_state->planar_linked_plane;
|
||||
|
||||
mode = PS_SCALER_MODE_PLANAR;
|
||||
|
||||
if (linked)
|
||||
mode |= PS_PLANE_Y_SEL(linked->id);
|
||||
}
|
||||
} else if (DISPLAY_VER(dev_priv) >= 10) {
|
||||
mode = PS_SCALER_MODE_NORMAL;
|
||||
} else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
|
||||
/*
|
||||
* when only 1 scaler is in use on a pipe with 2 scalers
|
||||
* scaler 0 operates in high quality (HQ) mode.
|
||||
* In this case use scaler 0 to take advantage of HQ mode
|
||||
*/
|
||||
scaler_state->scalers[*scaler_id].in_use = 0;
|
||||
*scaler_id = 0;
|
||||
scaler_state->scalers[0].in_use = 1;
|
||||
mode = SKL_PS_SCALER_MODE_HQ;
|
||||
} else {
|
||||
mode = SKL_PS_SCALER_MODE_DYN;
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: we should also check the scaler factors for pfit, so
|
||||
* this shouldn't be tied directly to planes.
|
||||
*/
|
||||
if (plane_state && plane_state->hw.fb) {
|
||||
const struct drm_framebuffer *fb = plane_state->hw.fb;
|
||||
const struct drm_rect *src = &plane_state->uapi.src;
|
||||
const struct drm_rect *dst = &plane_state->uapi.dst;
|
||||
int hscale, vscale, max_vscale, max_hscale;
|
||||
|
||||
/*
|
||||
* FIXME: When two scalers are needed, but only one of
|
||||
* them needs to downscale, we should make sure that
|
||||
* the one that needs downscaling support is assigned
|
||||
* as the first scaler, so we don't reject downscaling
|
||||
* unnecessarily.
|
||||
*/
|
||||
|
||||
if (DISPLAY_VER(dev_priv) >= 14) {
|
||||
/*
|
||||
* On versions 14 and up, only the first
|
||||
* scaler supports a vertical scaling factor
|
||||
* of more than 1.0, while a horizontal
|
||||
* scaling factor of 3.0 is supported.
|
||||
*/
|
||||
max_hscale = 0x30000 - 1;
|
||||
if (*scaler_id == 0)
|
||||
max_vscale = 0x30000 - 1;
|
||||
else
|
||||
max_vscale = 0x10000;
|
||||
|
||||
} else if (DISPLAY_VER(dev_priv) >= 10 ||
|
||||
!intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) {
|
||||
max_hscale = 0x30000 - 1;
|
||||
max_vscale = 0x30000 - 1;
|
||||
} else {
|
||||
max_hscale = 0x20000 - 1;
|
||||
max_vscale = 0x20000 - 1;
|
||||
}
|
||||
|
||||
/*
|
||||
* FIXME: We should change the if-else block above to
|
||||
* support HQ vs dynamic scaler properly.
|
||||
*/
|
||||
|
||||
/* Check if required scaling is within limits */
|
||||
hscale = drm_rect_calc_hscale(src, dst, 1, max_hscale);
|
||||
vscale = drm_rect_calc_vscale(src, dst, 1, max_vscale);
|
||||
|
||||
if (hscale < 0 || vscale < 0) {
|
||||
drm_dbg_kms(&dev_priv->drm,
|
||||
"Scaler %d doesn't support required plane scaling\n",
|
||||
*scaler_id);
|
||||
drm_rect_debug_print("src: ", src, true);
|
||||
drm_rect_debug_print("dst: ", dst, false);
|
||||
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
drm_dbg_kms(&dev_priv->drm, "Attached scaler id %u.%u to %s:%d\n",
|
||||
intel_crtc->pipe, *scaler_id, name, idx);
|
||||
scaler_state->scalers[*scaler_id].mode = mode;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
|
||||
* @dev_priv: i915 device
|
||||
* @intel_crtc: intel crtc
|
||||
* @crtc_state: incoming crtc_state to validate and setup scalers
|
||||
*
|
||||
* This function sets up scalers based on staged scaling requests for
|
||||
* a @crtc and its planes. It is called from crtc level check path. If request
|
||||
* is a supportable request, it attaches scalers to requested planes and crtc.
|
||||
*
|
||||
* This function takes into account the current scaler(s) in use by any planes
|
||||
* not being part of this atomic state
|
||||
*
|
||||
* Returns:
|
||||
* 0 - scalers were setup successfully
|
||||
* error code - otherwise
|
||||
*/
|
||||
int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
|
||||
struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_state *crtc_state)
|
||||
{
|
||||
struct drm_plane *plane = NULL;
|
||||
struct intel_plane *intel_plane;
|
||||
struct intel_crtc_scaler_state *scaler_state =
|
||||
&crtc_state->scaler_state;
|
||||
struct drm_atomic_state *drm_state = crtc_state->uapi.state;
|
||||
struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
|
||||
int num_scalers_need;
|
||||
int i;
|
||||
|
||||
num_scalers_need = hweight32(scaler_state->scaler_users);
|
||||
|
||||
/*
|
||||
* High level flow:
|
||||
* - staged scaler requests are already in scaler_state->scaler_users
|
||||
* - check whether staged scaling requests can be supported
|
||||
* - add planes using scalers that aren't in current transaction
|
||||
* - assign scalers to requested users
|
||||
* - as part of plane commit, scalers will be committed
|
||||
* (i.e., either attached or detached) to respective planes in hw
|
||||
* - as part of crtc_commit, scaler will be either attached or detached
|
||||
* to crtc in hw
|
||||
*/
|
||||
|
||||
/* fail if required scalers > available scalers */
|
||||
if (num_scalers_need > intel_crtc->num_scalers) {
|
||||
drm_dbg_kms(&dev_priv->drm,
|
||||
"Too many scaling requests %d > %d\n",
|
||||
num_scalers_need, intel_crtc->num_scalers);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* walkthrough scaler_users bits and start assigning scalers */
|
||||
for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
|
||||
struct intel_plane_state *plane_state = NULL;
|
||||
int *scaler_id;
|
||||
const char *name;
|
||||
int idx, ret;
|
||||
|
||||
/* skip if scaler not required */
|
||||
if (!(scaler_state->scaler_users & (1 << i)))
|
||||
continue;
|
||||
|
||||
if (i == SKL_CRTC_INDEX) {
|
||||
name = "CRTC";
|
||||
idx = intel_crtc->base.base.id;
|
||||
|
||||
/* panel fitter case: assign as a crtc scaler */
|
||||
scaler_id = &scaler_state->scaler_id;
|
||||
} else {
|
||||
name = "PLANE";
|
||||
|
||||
/* plane scaler case: assign as a plane scaler */
|
||||
/* find the plane that set the bit as scaler_user */
|
||||
plane = drm_state->planes[i].ptr;
|
||||
|
||||
/*
|
||||
* to enable/disable hq mode, add planes that are using scaler
|
||||
* into this transaction
|
||||
*/
|
||||
if (!plane) {
|
||||
struct drm_plane_state *state;
|
||||
|
||||
/*
|
||||
* GLK+ scalers don't have a HQ mode so it
|
||||
* isn't necessary to change between HQ and dyn mode
|
||||
* on those platforms.
|
||||
*/
|
||||
if (DISPLAY_VER(dev_priv) >= 10)
|
||||
continue;
|
||||
|
||||
plane = drm_plane_from_index(&dev_priv->drm, i);
|
||||
state = drm_atomic_get_plane_state(drm_state, plane);
|
||||
if (IS_ERR(state)) {
|
||||
drm_dbg_kms(&dev_priv->drm,
|
||||
"Failed to add [PLANE:%d] to drm_state\n",
|
||||
plane->base.id);
|
||||
return PTR_ERR(state);
|
||||
}
|
||||
}
|
||||
|
||||
intel_plane = to_intel_plane(plane);
|
||||
idx = plane->base.id;
|
||||
|
||||
/* plane on different crtc cannot be a scaler user of this crtc */
|
||||
if (drm_WARN_ON(&dev_priv->drm,
|
||||
intel_plane->pipe != intel_crtc->pipe))
|
||||
continue;
|
||||
|
||||
plane_state = intel_atomic_get_new_plane_state(intel_state,
|
||||
intel_plane);
|
||||
scaler_id = &plane_state->scaler_id;
|
||||
}
|
||||
|
||||
ret = intel_atomic_setup_scaler(scaler_state, num_scalers_need,
|
||||
intel_crtc, name, idx,
|
||||
plane_state, scaler_id);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int glk_coef_tap(int i)
|
||||
{
|
||||
return i % 7;
|
||||
|
||||
@@ -8,17 +8,22 @@
|
||||
#include <linux/types.h>
|
||||
|
||||
enum drm_scaling_filter;
|
||||
struct drm_i915_private;
|
||||
struct intel_crtc_state;
|
||||
struct intel_plane_state;
|
||||
struct intel_plane;
|
||||
enum pipe;
|
||||
struct drm_i915_private;
|
||||
struct intel_crtc;
|
||||
struct intel_crtc_state;
|
||||
struct intel_plane;
|
||||
struct intel_plane_state;
|
||||
|
||||
int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state);
|
||||
|
||||
int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
|
||||
struct intel_plane_state *plane_state);
|
||||
|
||||
int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
|
||||
struct intel_crtc *intel_crtc,
|
||||
struct intel_crtc_state *crtc_state);
|
||||
|
||||
void skl_pfit_enable(const struct intel_crtc_state *crtc_state);
|
||||
|
||||
void skl_program_plane_scaler(struct intel_plane *plane,
|
||||
@@ -26,4 +31,5 @@ void skl_program_plane_scaler(struct intel_plane *plane,
|
||||
const struct intel_plane_state *plane_state);
|
||||
void skl_detach_scalers(const struct intel_crtc_state *crtc_state);
|
||||
void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -250,18 +250,46 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
|
||||
if (!slave)
|
||||
return 0;
|
||||
|
||||
command = readl(bus->base + ASPEED_I2C_CMD_REG);
|
||||
/*
|
||||
* Handle stop conditions early, prior to SLAVE_MATCH. Some masters may drive
|
||||
* transfers with low enough latency between the nak/stop phase of the current
|
||||
* command and the start/address phase of the following command that the
|
||||
* interrupts are coalesced by the time we process them.
|
||||
*/
|
||||
if (irq_status & ASPEED_I2CD_INTR_NORMAL_STOP) {
|
||||
irq_handled |= ASPEED_I2CD_INTR_NORMAL_STOP;
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_STOP;
|
||||
}
|
||||
|
||||
/* Slave was requested, restart state machine. */
|
||||
if (irq_status & ASPEED_I2CD_INTR_TX_NAK &&
|
||||
bus->slave_state == ASPEED_I2C_SLAVE_READ_PROCESSED) {
|
||||
irq_handled |= ASPEED_I2CD_INTR_TX_NAK;
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_STOP;
|
||||
}
|
||||
|
||||
/* Propagate any stop conditions to the slave implementation. */
|
||||
if (bus->slave_state == ASPEED_I2C_SLAVE_STOP) {
|
||||
i2c_slave_event(slave, I2C_SLAVE_STOP, &value);
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE;
|
||||
}
|
||||
|
||||
/*
|
||||
* Now that we've dealt with any potentially coalesced stop conditions,
|
||||
* address any start conditions.
|
||||
*/
|
||||
if (irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH) {
|
||||
irq_handled |= ASPEED_I2CD_INTR_SLAVE_MATCH;
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_START;
|
||||
}
|
||||
|
||||
/* Slave is not currently active, irq was for someone else. */
|
||||
/*
|
||||
* If the slave has been stopped and not started then slave interrupt
|
||||
* handling is complete.
|
||||
*/
|
||||
if (bus->slave_state == ASPEED_I2C_SLAVE_INACTIVE)
|
||||
return irq_handled;
|
||||
|
||||
command = readl(bus->base + ASPEED_I2C_CMD_REG);
|
||||
dev_dbg(bus->dev, "slave irq status 0x%08x, cmd 0x%08x\n",
|
||||
irq_status, command);
|
||||
|
||||
@@ -280,17 +308,6 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
|
||||
irq_handled |= ASPEED_I2CD_INTR_RX_DONE;
|
||||
}
|
||||
|
||||
/* Slave was asked to stop. */
|
||||
if (irq_status & ASPEED_I2CD_INTR_NORMAL_STOP) {
|
||||
irq_handled |= ASPEED_I2CD_INTR_NORMAL_STOP;
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_STOP;
|
||||
}
|
||||
if (irq_status & ASPEED_I2CD_INTR_TX_NAK &&
|
||||
bus->slave_state == ASPEED_I2C_SLAVE_READ_PROCESSED) {
|
||||
irq_handled |= ASPEED_I2CD_INTR_TX_NAK;
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_STOP;
|
||||
}
|
||||
|
||||
switch (bus->slave_state) {
|
||||
case ASPEED_I2C_SLAVE_READ_REQUESTED:
|
||||
if (unlikely(irq_status & ASPEED_I2CD_INTR_TX_ACK))
|
||||
@@ -319,8 +336,7 @@ static u32 aspeed_i2c_slave_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
|
||||
i2c_slave_event(slave, I2C_SLAVE_WRITE_RECEIVED, &value);
|
||||
break;
|
||||
case ASPEED_I2C_SLAVE_STOP:
|
||||
i2c_slave_event(slave, I2C_SLAVE_STOP, &value);
|
||||
bus->slave_state = ASPEED_I2C_SLAVE_INACTIVE;
|
||||
/* Stop event handling is done early. Unreachable. */
|
||||
break;
|
||||
case ASPEED_I2C_SLAVE_START:
|
||||
/* Slave was just started. Waiting for the next event. */;
|
||||
|
||||
@@ -632,8 +632,10 @@ static int tiadc_probe(struct platform_device *pdev)
|
||||
platform_set_drvdata(pdev, indio_dev);
|
||||
|
||||
err = tiadc_request_dma(pdev, adc_dev);
|
||||
if (err && err == -EPROBE_DEFER)
|
||||
if (err && err != -ENODEV) {
|
||||
dev_err_probe(&pdev->dev, err, "DMA request failed\n");
|
||||
goto err_dma;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
|
||||
@@ -44,6 +44,16 @@ int iio_triggered_buffer_setup_ext(struct iio_dev *indio_dev,
|
||||
struct iio_buffer *buffer;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* iio_triggered_buffer_cleanup() assumes that the buffer allocated here
|
||||
* is assigned to indio_dev->buffer but this is only the case if this
|
||||
* function is the first caller to iio_device_attach_buffer(). If
|
||||
* indio_dev->buffer is already set then we can't proceed otherwise the
|
||||
* cleanup function will try to free a buffer that was not allocated here.
|
||||
*/
|
||||
if (indio_dev->buffer)
|
||||
return -EADDRINUSE;
|
||||
|
||||
buffer = iio_kfifo_allocate();
|
||||
if (!buffer) {
|
||||
ret = -ENOMEM;
|
||||
|
||||
@@ -15,8 +15,8 @@
|
||||
/* Conversion times in us */
|
||||
static const u16 ms_sensors_ht_t_conversion_time[] = { 50000, 25000,
|
||||
13000, 7000 };
|
||||
static const u16 ms_sensors_ht_h_conversion_time[] = { 16000, 3000,
|
||||
5000, 8000 };
|
||||
static const u16 ms_sensors_ht_h_conversion_time[] = { 16000, 5000,
|
||||
3000, 8000 };
|
||||
static const u16 ms_sensors_tp_conversion_time[] = { 500, 1100, 2100,
|
||||
4100, 8220, 16440 };
|
||||
|
||||
|
||||
@@ -1273,6 +1273,59 @@ static int adis16475_config_irq_pin(struct adis16475 *st)
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int adis16475_probe(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
struct adis16475 *st;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
|
||||
st->info = spi_get_device_match_data(spi);
|
||||
if (!st->info)
|
||||
return -EINVAL;
|
||||
|
||||
ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
indio_dev->name = st->info->name;
|
||||
indio_dev->channels = st->info->channels;
|
||||
indio_dev->num_channels = st->info->num_channels;
|
||||
indio_dev->info = &adis16475_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
|
||||
ret = __adis_initial_startup(&st->adis);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = adis16475_config_irq_pin(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = adis16475_config_sync_mode(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
|
||||
adis16475_trigger_handler);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_iio_device_register(&spi->dev, indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
adis16475_debugfs_init(indio_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id adis16475_of_match[] = {
|
||||
{ .compatible = "adi,adis16470",
|
||||
.data = &adis16475_chip_info[ADIS16470] },
|
||||
@@ -1318,57 +1371,30 @@ static const struct of_device_id adis16475_of_match[] = {
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, adis16475_of_match);
|
||||
|
||||
static int adis16475_probe(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev;
|
||||
struct adis16475 *st;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
|
||||
st->info = device_get_match_data(&spi->dev);
|
||||
if (!st->info)
|
||||
return -EINVAL;
|
||||
|
||||
ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
indio_dev->name = st->info->name;
|
||||
indio_dev->channels = st->info->channels;
|
||||
indio_dev->num_channels = st->info->num_channels;
|
||||
indio_dev->info = &adis16475_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
|
||||
ret = __adis_initial_startup(&st->adis);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = adis16475_config_irq_pin(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = adis16475_config_sync_mode(st);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev,
|
||||
adis16475_trigger_handler);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = devm_iio_device_register(&spi->dev, indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
adis16475_debugfs_init(indio_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
static const struct spi_device_id adis16475_ids[] = {
|
||||
{ "adis16470", (kernel_ulong_t)&adis16475_chip_info[ADIS16470] },
|
||||
{ "adis16475-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16475_1] },
|
||||
{ "adis16475-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16475_2] },
|
||||
{ "adis16475-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16475_3] },
|
||||
{ "adis16477-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16477_1] },
|
||||
{ "adis16477-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16477_2] },
|
||||
{ "adis16477-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16477_3] },
|
||||
{ "adis16465-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16465_1] },
|
||||
{ "adis16465-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16465_2] },
|
||||
{ "adis16465-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16465_3] },
|
||||
{ "adis16467-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_1] },
|
||||
{ "adis16467-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_2] },
|
||||
{ "adis16467-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16467_3] },
|
||||
{ "adis16500", (kernel_ulong_t)&adis16475_chip_info[ADIS16500] },
|
||||
{ "adis16505-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_1] },
|
||||
{ "adis16505-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_2] },
|
||||
{ "adis16505-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16505_3] },
|
||||
{ "adis16507-1", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_1] },
|
||||
{ "adis16507-2", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_2] },
|
||||
{ "adis16507-3", (kernel_ulong_t)&adis16475_chip_info[ADIS16507_3] },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, adis16475_ids);
|
||||
|
||||
static struct spi_driver adis16475_driver = {
|
||||
.driver = {
|
||||
@@ -1376,6 +1402,7 @@ static struct spi_driver adis16475_driver = {
|
||||
.of_match_table = adis16475_of_match,
|
||||
},
|
||||
.probe = adis16475_probe,
|
||||
.id_table = adis16475_ids,
|
||||
};
|
||||
module_spi_driver(adis16475_driver);
|
||||
|
||||
|
||||
@@ -727,13 +727,13 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev,
|
||||
ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
|
||||
chan->channel2, val);
|
||||
mutex_unlock(&st->lock);
|
||||
return IIO_VAL_INT;
|
||||
return ret;
|
||||
case IIO_ACCEL:
|
||||
mutex_lock(&st->lock);
|
||||
ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
|
||||
chan->channel2, val);
|
||||
mutex_unlock(&st->lock);
|
||||
return IIO_VAL_INT;
|
||||
return ret;
|
||||
|
||||
default:
|
||||
return -EINVAL;
|
||||
|
||||
@@ -105,6 +105,9 @@ static int micro_key_probe(struct platform_device *pdev)
|
||||
keys->codes = devm_kmemdup(&pdev->dev, micro_keycodes,
|
||||
keys->input->keycodesize * keys->input->keycodemax,
|
||||
GFP_KERNEL);
|
||||
if (!keys->codes)
|
||||
return -ENOMEM;
|
||||
|
||||
keys->input->keycode = keys->codes;
|
||||
|
||||
__set_bit(EV_KEY, keys->input->evbit);
|
||||
|
||||
@@ -299,6 +299,11 @@ static int soc_button_parse_btn_desc(struct device *dev,
|
||||
info->name = "power";
|
||||
info->event_code = KEY_POWER;
|
||||
info->wakeup = true;
|
||||
} else if (upage == 0x01 && usage == 0xc6) {
|
||||
info->name = "airplane mode switch";
|
||||
info->event_type = EV_SW;
|
||||
info->event_code = SW_RFKILL_ALL;
|
||||
info->active_low = false;
|
||||
} else if (upage == 0x01 && usage == 0xca) {
|
||||
info->name = "rotation lock switch";
|
||||
info->event_type = EV_SW;
|
||||
|
||||
@@ -382,6 +382,9 @@ struct icc_node_data *of_icc_get_from_provider(struct of_phandle_args *spec)
|
||||
}
|
||||
mutex_unlock(&icc_lock);
|
||||
|
||||
if (!node)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
if (IS_ERR(node))
|
||||
return ERR_CAST(node);
|
||||
|
||||
|
||||
@@ -1762,11 +1762,12 @@ static void integrity_metadata(struct work_struct *w)
|
||||
sectors_to_process = dio->range.n_sectors;
|
||||
|
||||
__bio_for_each_segment(bv, bio, iter, dio->bio_details.bi_iter) {
|
||||
struct bio_vec bv_copy = bv;
|
||||
unsigned pos;
|
||||
char *mem, *checksums_ptr;
|
||||
|
||||
again:
|
||||
mem = (char *)kmap_atomic(bv.bv_page) + bv.bv_offset;
|
||||
mem = (char *)kmap_atomic(bv_copy.bv_page) + bv_copy.bv_offset;
|
||||
pos = 0;
|
||||
checksums_ptr = checksums;
|
||||
do {
|
||||
@@ -1775,7 +1776,7 @@ again:
|
||||
sectors_to_process -= ic->sectors_per_block;
|
||||
pos += ic->sectors_per_block << SECTOR_SHIFT;
|
||||
sector += ic->sectors_per_block;
|
||||
} while (pos < bv.bv_len && sectors_to_process && checksums != checksums_onstack);
|
||||
} while (pos < bv_copy.bv_len && sectors_to_process && checksums != checksums_onstack);
|
||||
kunmap_atomic(mem);
|
||||
|
||||
r = dm_integrity_rw_tag(ic, checksums, &dio->metadata_block, &dio->metadata_offset,
|
||||
@@ -1796,9 +1797,9 @@ again:
|
||||
if (!sectors_to_process)
|
||||
break;
|
||||
|
||||
if (unlikely(pos < bv.bv_len)) {
|
||||
bv.bv_offset += pos;
|
||||
bv.bv_len -= pos;
|
||||
if (unlikely(pos < bv_copy.bv_len)) {
|
||||
bv_copy.bv_offset += pos;
|
||||
bv_copy.bv_len -= pos;
|
||||
goto again;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -342,7 +342,7 @@ static u32 owl_emac_dma_cmd_stop(struct owl_emac_priv *priv)
|
||||
static void owl_emac_set_hw_mac_addr(struct net_device *netdev)
|
||||
{
|
||||
struct owl_emac_priv *priv = netdev_priv(netdev);
|
||||
u8 *mac_addr = netdev->dev_addr;
|
||||
const u8 *mac_addr = netdev->dev_addr;
|
||||
u32 addr_high, addr_low;
|
||||
|
||||
addr_high = mac_addr[0] << 8 | mac_addr[1];
|
||||
|
||||
@@ -955,7 +955,7 @@ static int netdev_open(struct net_device *dev)
|
||||
writew(0, ioaddr + PerfFilterTable + 4);
|
||||
writew(0, ioaddr + PerfFilterTable + 8);
|
||||
for (i = 1; i < 16; i++) {
|
||||
__be16 *eaddrs = (__be16 *)dev->dev_addr;
|
||||
const __be16 *eaddrs = (const __be16 *)dev->dev_addr;
|
||||
void __iomem *setup_frm = ioaddr + PerfFilterTable + i * 16;
|
||||
writew(be16_to_cpu(eaddrs[2]), setup_frm); setup_frm += 4;
|
||||
writew(be16_to_cpu(eaddrs[1]), setup_frm); setup_frm += 4;
|
||||
@@ -1787,14 +1787,14 @@ static void set_rx_mode(struct net_device *dev)
|
||||
} else if (netdev_mc_count(dev) <= 14) {
|
||||
/* Use the 16 element perfect filter, skip first two entries. */
|
||||
void __iomem *filter_addr = ioaddr + PerfFilterTable + 2 * 16;
|
||||
__be16 *eaddrs;
|
||||
const __be16 *eaddrs;
|
||||
netdev_for_each_mc_addr(ha, dev) {
|
||||
eaddrs = (__be16 *) ha->addr;
|
||||
writew(be16_to_cpu(eaddrs[2]), filter_addr); filter_addr += 4;
|
||||
writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
|
||||
writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 8;
|
||||
}
|
||||
eaddrs = (__be16 *)dev->dev_addr;
|
||||
eaddrs = (const __be16 *)dev->dev_addr;
|
||||
i = netdev_mc_count(dev) + 2;
|
||||
while (i++ < 16) {
|
||||
writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;
|
||||
@@ -1805,7 +1805,7 @@ static void set_rx_mode(struct net_device *dev)
|
||||
} else {
|
||||
/* Must use a multicast hash table. */
|
||||
void __iomem *filter_addr;
|
||||
__be16 *eaddrs;
|
||||
const __be16 *eaddrs;
|
||||
__le16 mc_filter[32] __attribute__ ((aligned(sizeof(long)))); /* Multicast hash filter */
|
||||
|
||||
memset(mc_filter, 0, sizeof(mc_filter));
|
||||
@@ -1819,7 +1819,7 @@ static void set_rx_mode(struct net_device *dev)
|
||||
}
|
||||
/* Clear the perfect filter list, skip first two entries. */
|
||||
filter_addr = ioaddr + PerfFilterTable + 2 * 16;
|
||||
eaddrs = (__be16 *)dev->dev_addr;
|
||||
eaddrs = (const __be16 *)dev->dev_addr;
|
||||
for (i = 2; i < 16; i++) {
|
||||
writew(be16_to_cpu(eaddrs[0]), filter_addr); filter_addr += 4;
|
||||
writew(be16_to_cpu(eaddrs[1]), filter_addr); filter_addr += 4;
|
||||
|
||||
@@ -1008,7 +1008,7 @@ static void slic_set_link_autoneg(struct slic_device *sdev)
|
||||
|
||||
static void slic_set_mac_address(struct slic_device *sdev)
|
||||
{
|
||||
u8 *addr = sdev->netdev->dev_addr;
|
||||
const u8 *addr = sdev->netdev->dev_addr;
|
||||
u32 val;
|
||||
|
||||
val = addr[5] | addr[4] << 8 | addr[3] << 16 | addr[2] << 24;
|
||||
|
||||
@@ -2712,7 +2712,7 @@ static int ace_set_mac_addr(struct net_device *dev, void *p)
|
||||
struct ace_private *ap = netdev_priv(dev);
|
||||
struct ace_regs __iomem *regs = ap->regs;
|
||||
struct sockaddr *addr=p;
|
||||
u8 *da;
|
||||
const u8 *da;
|
||||
struct cmd cmd;
|
||||
|
||||
if(netif_running(dev))
|
||||
@@ -2720,7 +2720,7 @@ static int ace_set_mac_addr(struct net_device *dev, void *p)
|
||||
|
||||
memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
|
||||
|
||||
da = (u8 *)dev->dev_addr;
|
||||
da = (const u8 *)dev->dev_addr;
|
||||
|
||||
writel(da[0] << 8 | da[1], ®s->MacAddrHi);
|
||||
writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
|
||||
|
||||
@@ -853,7 +853,7 @@ static int init_phy(struct net_device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)
|
||||
static void tse_update_mac_addr(struct altera_tse_private *priv, const u8 *addr)
|
||||
{
|
||||
u32 msb;
|
||||
u32 lsb;
|
||||
|
||||
@@ -529,7 +529,8 @@ static void mace_write(mace_private *lp, unsigned int ioaddr, int reg,
|
||||
mace_init
|
||||
Resets the MACE chip.
|
||||
---------------------------------------------------------------------------- */
|
||||
static int mace_init(mace_private *lp, unsigned int ioaddr, char *enet_addr)
|
||||
static int mace_init(mace_private *lp, unsigned int ioaddr,
|
||||
const char *enet_addr)
|
||||
{
|
||||
int i;
|
||||
int ct = 0;
|
||||
|
||||
@@ -1087,7 +1087,7 @@ static int xgbe_add_mac_addresses(struct xgbe_prv_data *pdata)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, u8 *addr)
|
||||
static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, const u8 *addr)
|
||||
{
|
||||
unsigned int mac_addr_hi, mac_addr_lo;
|
||||
|
||||
|
||||
@@ -730,7 +730,7 @@ struct xgbe_ext_stats {
|
||||
struct xgbe_hw_if {
|
||||
int (*tx_complete)(struct xgbe_ring_desc *);
|
||||
|
||||
int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
|
||||
int (*set_mac_address)(struct xgbe_prv_data *, const u8 *addr);
|
||||
int (*config_rx_mode)(struct xgbe_prv_data *);
|
||||
|
||||
int (*enable_rx_csum)(struct xgbe_prv_data *);
|
||||
|
||||
@@ -65,7 +65,7 @@ void xge_mac_set_speed(struct xge_pdata *pdata)
|
||||
|
||||
void xge_mac_set_station_addr(struct xge_pdata *pdata)
|
||||
{
|
||||
u8 *dev_addr = pdata->ndev->dev_addr;
|
||||
const u8 *dev_addr = pdata->ndev->dev_addr;
|
||||
u32 addr0, addr1;
|
||||
|
||||
addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
|
||||
|
||||
@@ -378,8 +378,8 @@ u32 xgene_enet_rd_stat(struct xgene_enet_pdata *pdata, u32 rd_addr)
|
||||
|
||||
static void xgene_gmac_set_mac_addr(struct xgene_enet_pdata *pdata)
|
||||
{
|
||||
const u8 *dev_addr = pdata->ndev->dev_addr;
|
||||
u32 addr0, addr1;
|
||||
u8 *dev_addr = pdata->ndev->dev_addr;
|
||||
|
||||
addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
|
||||
(dev_addr[1] << 8) | dev_addr[0];
|
||||
|
||||
@@ -165,8 +165,8 @@ static void xgene_sgmac_reset(struct xgene_enet_pdata *p)
|
||||
|
||||
static void xgene_sgmac_set_mac_addr(struct xgene_enet_pdata *p)
|
||||
{
|
||||
const u8 *dev_addr = p->ndev->dev_addr;
|
||||
u32 addr0, addr1;
|
||||
u8 *dev_addr = p->ndev->dev_addr;
|
||||
|
||||
addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
|
||||
(dev_addr[1] << 8) | dev_addr[0];
|
||||
|
||||
@@ -207,8 +207,8 @@ static void xgene_pcs_reset(struct xgene_enet_pdata *pdata)
|
||||
|
||||
static void xgene_xgmac_set_mac_addr(struct xgene_enet_pdata *pdata)
|
||||
{
|
||||
const u8 *dev_addr = pdata->ndev->dev_addr;
|
||||
u32 addr0, addr1;
|
||||
u8 *dev_addr = pdata->ndev->dev_addr;
|
||||
|
||||
addr0 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
|
||||
(dev_addr[1] << 8) | dev_addr[0];
|
||||
|
||||
@@ -308,7 +308,7 @@ bmac_init_registers(struct net_device *dev)
|
||||
{
|
||||
struct bmac_data *bp = netdev_priv(dev);
|
||||
volatile unsigned short regValue;
|
||||
unsigned short *pWord16;
|
||||
const unsigned short *pWord16;
|
||||
int i;
|
||||
|
||||
/* XXDEBUG(("bmac: enter init_registers\n")); */
|
||||
@@ -371,7 +371,7 @@ bmac_init_registers(struct net_device *dev)
|
||||
bmwrite(dev, BHASH1, bp->hash_table_mask[2]); /* bits 47 - 32 */
|
||||
bmwrite(dev, BHASH0, bp->hash_table_mask[3]); /* bits 63 - 48 */
|
||||
|
||||
pWord16 = (unsigned short *)dev->dev_addr;
|
||||
pWord16 = (const unsigned short *)dev->dev_addr;
|
||||
bmwrite(dev, MADD0, *pWord16++);
|
||||
bmwrite(dev, MADD1, *pWord16++);
|
||||
bmwrite(dev, MADD2, *pWord16);
|
||||
@@ -522,7 +522,7 @@ static int bmac_set_address(struct net_device *dev, void *addr)
|
||||
{
|
||||
struct bmac_data *bp = netdev_priv(dev);
|
||||
unsigned char *p = addr;
|
||||
unsigned short *pWord16;
|
||||
const unsigned short *pWord16;
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
@@ -533,7 +533,7 @@ static int bmac_set_address(struct net_device *dev, void *addr)
|
||||
dev->dev_addr[i] = p[i];
|
||||
}
|
||||
/* load up the hardware address */
|
||||
pWord16 = (unsigned short *)dev->dev_addr;
|
||||
pWord16 = (const unsigned short *)dev->dev_addr;
|
||||
bmwrite(dev, MADD0, *pWord16++);
|
||||
bmwrite(dev, MADD1, *pWord16++);
|
||||
bmwrite(dev, MADD2, *pWord16);
|
||||
|
||||
@@ -219,7 +219,7 @@ struct aq_hw_ops {
|
||||
int (*hw_ring_tx_head_update)(struct aq_hw_s *self,
|
||||
struct aq_ring_s *aq_ring);
|
||||
|
||||
int (*hw_set_mac_address)(struct aq_hw_s *self, u8 *mac_addr);
|
||||
int (*hw_set_mac_address)(struct aq_hw_s *self, const u8 *mac_addr);
|
||||
|
||||
int (*hw_soft_reset)(struct aq_hw_s *self);
|
||||
|
||||
@@ -228,7 +228,7 @@ struct aq_hw_ops {
|
||||
|
||||
int (*hw_reset)(struct aq_hw_s *self);
|
||||
|
||||
int (*hw_init)(struct aq_hw_s *self, u8 *mac_addr);
|
||||
int (*hw_init)(struct aq_hw_s *self, const u8 *mac_addr);
|
||||
|
||||
int (*hw_start)(struct aq_hw_s *self);
|
||||
|
||||
@@ -375,7 +375,7 @@ struct aq_fw_ops {
|
||||
int (*set_phyloopback)(struct aq_hw_s *self, u32 mode, bool enable);
|
||||
|
||||
int (*set_power)(struct aq_hw_s *self, unsigned int power_state,
|
||||
u8 *mac);
|
||||
const u8 *mac);
|
||||
|
||||
int (*send_fw_request)(struct aq_hw_s *self,
|
||||
const struct hw_fw_request_iface *fw_req,
|
||||
|
||||
@@ -35,7 +35,7 @@ static int aq_apply_macsec_cfg(struct aq_nic_s *nic);
|
||||
static int aq_apply_secy_cfg(struct aq_nic_s *nic,
|
||||
const struct macsec_secy *secy);
|
||||
|
||||
static void aq_ether_addr_to_mac(u32 mac[2], unsigned char *emac)
|
||||
static void aq_ether_addr_to_mac(u32 mac[2], const unsigned char *emac)
|
||||
{
|
||||
u32 tmp[2] = { 0 };
|
||||
|
||||
|
||||
@@ -322,7 +322,7 @@ static int hw_atl_a0_hw_init_rx_path(struct aq_hw_s *self)
|
||||
return aq_hw_err_from_flags(self);
|
||||
}
|
||||
|
||||
static int hw_atl_a0_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr)
|
||||
static int hw_atl_a0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr)
|
||||
{
|
||||
unsigned int h = 0U;
|
||||
unsigned int l = 0U;
|
||||
@@ -348,7 +348,7 @@ err_exit:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int hw_atl_a0_hw_init(struct aq_hw_s *self, u8 *mac_addr)
|
||||
static int hw_atl_a0_hw_init(struct aq_hw_s *self, const u8 *mac_addr)
|
||||
{
|
||||
static u32 aq_hw_atl_igcr_table_[4][2] = {
|
||||
[AQ_HW_IRQ_INVALID] = { 0x20000000U, 0x20000000U },
|
||||
|
||||
@@ -533,7 +533,7 @@ static int hw_atl_b0_hw_init_rx_path(struct aq_hw_s *self)
|
||||
return aq_hw_err_from_flags(self);
|
||||
}
|
||||
|
||||
int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr)
|
||||
int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr)
|
||||
{
|
||||
unsigned int h = 0U;
|
||||
unsigned int l = 0U;
|
||||
@@ -558,7 +558,7 @@ err_exit:
|
||||
return err;
|
||||
}
|
||||
|
||||
static int hw_atl_b0_hw_init(struct aq_hw_s *self, u8 *mac_addr)
|
||||
static int hw_atl_b0_hw_init(struct aq_hw_s *self, const u8 *mac_addr)
|
||||
{
|
||||
static u32 aq_hw_atl_igcr_table_[4][2] = {
|
||||
[AQ_HW_IRQ_INVALID] = { 0x20000000U, 0x20000000U },
|
||||
|
||||
@@ -58,7 +58,7 @@ int hw_atl_b0_hw_ring_rx_stop(struct aq_hw_s *self, struct aq_ring_s *ring);
|
||||
|
||||
void hw_atl_b0_hw_init_rx_rss_ctrl1(struct aq_hw_s *self);
|
||||
|
||||
int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr);
|
||||
int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, const u8 *mac_addr);
|
||||
|
||||
int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc);
|
||||
int hw_atl_b0_set_loopback(struct aq_hw_s *self, u32 mode, bool enable);
|
||||
|
||||
@@ -965,7 +965,7 @@ u32 hw_atl_utils_get_fw_version(struct aq_hw_s *self)
|
||||
}
|
||||
|
||||
static int aq_fw1x_set_wake_magic(struct aq_hw_s *self, bool wol_enabled,
|
||||
u8 *mac)
|
||||
const u8 *mac)
|
||||
{
|
||||
struct hw_atl_utils_fw_rpc *prpc = NULL;
|
||||
unsigned int rpc_size = 0U;
|
||||
@@ -1008,7 +1008,7 @@ err_exit:
|
||||
}
|
||||
|
||||
static int aq_fw1x_set_power(struct aq_hw_s *self, unsigned int power_state,
|
||||
u8 *mac)
|
||||
const u8 *mac)
|
||||
{
|
||||
struct hw_atl_utils_fw_rpc *prpc = NULL;
|
||||
unsigned int rpc_size = 0U;
|
||||
|
||||
@@ -355,7 +355,7 @@ static int aq_fw2x_get_phy_temp(struct aq_hw_s *self, int *temp)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int aq_fw2x_set_wol(struct aq_hw_s *self, u8 *mac)
|
||||
static int aq_fw2x_set_wol(struct aq_hw_s *self, const u8 *mac)
|
||||
{
|
||||
struct hw_atl_utils_fw_rpc *rpc = NULL;
|
||||
struct offload_info *info = NULL;
|
||||
@@ -401,7 +401,7 @@ err_exit:
|
||||
}
|
||||
|
||||
static int aq_fw2x_set_power(struct aq_hw_s *self, unsigned int power_state,
|
||||
u8 *mac)
|
||||
const u8 *mac)
|
||||
{
|
||||
int err = 0;
|
||||
|
||||
|
||||
@@ -530,7 +530,7 @@ static int hw_atl2_hw_init_rx_path(struct aq_hw_s *self)
|
||||
return aq_hw_err_from_flags(self);
|
||||
}
|
||||
|
||||
static int hw_atl2_hw_init(struct aq_hw_s *self, u8 *mac_addr)
|
||||
static int hw_atl2_hw_init(struct aq_hw_s *self, const u8 *mac_addr)
|
||||
{
|
||||
static u32 aq_hw_atl2_igcr_table_[4][2] = {
|
||||
[AQ_HW_IRQ_INVALID] = { 0x20000000U, 0x20000000U },
|
||||
|
||||
@@ -866,10 +866,13 @@ static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
|
||||
netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
|
||||
offset, adapter->ring_size);
|
||||
err = -1;
|
||||
goto failed;
|
||||
goto free_buffer;
|
||||
}
|
||||
|
||||
return 0;
|
||||
free_buffer:
|
||||
kfree(tx_ring->tx_buffer);
|
||||
tx_ring->tx_buffer = NULL;
|
||||
failed:
|
||||
if (adapter->ring_vir_addr != NULL) {
|
||||
dma_free_coherent(&pdev->dev, adapter->ring_size,
|
||||
|
||||
@@ -218,7 +218,8 @@ static inline void __b44_cam_read(struct b44 *bp, unsigned char *data, int index
|
||||
data[1] = (val >> 0) & 0xFF;
|
||||
}
|
||||
|
||||
static inline void __b44_cam_write(struct b44 *bp, unsigned char *data, int index)
|
||||
static inline void __b44_cam_write(struct b44 *bp,
|
||||
const unsigned char *data, int index)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
@@ -1507,7 +1508,8 @@ static void bwfilter_table(struct b44 *bp, u8 *pp, u32 bytes, u32 table_offset)
|
||||
}
|
||||
}
|
||||
|
||||
static int b44_magic_pattern(u8 *macaddr, u8 *ppattern, u8 *pmask, int offset)
|
||||
static int b44_magic_pattern(const u8 *macaddr, u8 *ppattern, u8 *pmask,
|
||||
int offset)
|
||||
{
|
||||
int magicsync = 6;
|
||||
int k, j, len = offset;
|
||||
|
||||
@@ -1820,7 +1820,7 @@ static inline void umac_reset(struct bcm_sysport_priv *priv)
|
||||
}
|
||||
|
||||
static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
|
||||
unsigned char *addr)
|
||||
const unsigned char *addr)
|
||||
{
|
||||
u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
|
||||
addr[3];
|
||||
|
||||
@@ -768,7 +768,7 @@ static void bgmac_umac_cmd_maskset(struct bgmac *bgmac, u32 mask, u32 set,
|
||||
udelay(2);
|
||||
}
|
||||
|
||||
static void bgmac_write_mac_address(struct bgmac *bgmac, u8 *addr)
|
||||
static void bgmac_write_mac_address(struct bgmac *bgmac, const u8 *addr)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
|
||||
@@ -2704,7 +2704,7 @@ bnx2_alloc_bad_rbuf(struct bnx2 *bp)
|
||||
}
|
||||
|
||||
static void
|
||||
bnx2_set_mac_addr(struct bnx2 *bp, u8 *mac_addr, u32 pos)
|
||||
bnx2_set_mac_addr(struct bnx2 *bp, const u8 *mac_addr, u32 pos)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
|
||||
@@ -2002,7 +2002,7 @@ int bnx2x_idle_chk(struct bnx2x *bp);
|
||||
* operation has been successfully scheduled and a negative - if a requested
|
||||
* operations has failed.
|
||||
*/
|
||||
int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac,
|
||||
int bnx2x_set_mac_one(struct bnx2x *bp, const u8 *mac,
|
||||
struct bnx2x_vlan_mac_obj *obj, bool set,
|
||||
int mac_type, unsigned long *ramrod_flags);
|
||||
|
||||
|
||||
@@ -8428,7 +8428,7 @@ alloc_mem_err:
|
||||
* Init service functions
|
||||
*/
|
||||
|
||||
int bnx2x_set_mac_one(struct bnx2x *bp, u8 *mac,
|
||||
int bnx2x_set_mac_one(struct bnx2x *bp, const u8 *mac,
|
||||
struct bnx2x_vlan_mac_obj *obj, bool set,
|
||||
int mac_type, unsigned long *ramrod_flags)
|
||||
{
|
||||
@@ -9157,7 +9157,7 @@ u32 bnx2x_send_unload_req(struct bnx2x *bp, int unload_mode)
|
||||
|
||||
else if (bp->wol) {
|
||||
u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
|
||||
u8 *mac_addr = bp->dev->dev_addr;
|
||||
const u8 *mac_addr = bp->dev->dev_addr;
|
||||
struct pci_dev *pdev = bp->pdev;
|
||||
u32 val;
|
||||
u16 pmc;
|
||||
|
||||
@@ -508,7 +508,8 @@ int bnx2x_vfpf_init(struct bnx2x *bp);
|
||||
void bnx2x_vfpf_close_vf(struct bnx2x *bp);
|
||||
int bnx2x_vfpf_setup_q(struct bnx2x *bp, struct bnx2x_fastpath *fp,
|
||||
bool is_leading);
|
||||
int bnx2x_vfpf_config_mac(struct bnx2x *bp, u8 *addr, u8 vf_qid, bool set);
|
||||
int bnx2x_vfpf_config_mac(struct bnx2x *bp, const u8 *addr, u8 vf_qid,
|
||||
bool set);
|
||||
int bnx2x_vfpf_config_rss(struct bnx2x *bp,
|
||||
struct bnx2x_config_rss_params *params);
|
||||
int bnx2x_vfpf_set_mcast(struct net_device *dev);
|
||||
|
||||
@@ -722,7 +722,7 @@ out:
|
||||
}
|
||||
|
||||
/* request pf to add a mac for the vf */
|
||||
int bnx2x_vfpf_config_mac(struct bnx2x *bp, u8 *addr, u8 vf_qid, bool set)
|
||||
int bnx2x_vfpf_config_mac(struct bnx2x *bp, const u8 *addr, u8 vf_qid, bool set)
|
||||
{
|
||||
struct vfpf_set_q_filters_tlv *req = &bp->vf2pf_mbox->req.set_q_filters;
|
||||
struct pfvf_general_resp_tlv *resp = &bp->vf2pf_mbox->resp.general_resp;
|
||||
|
||||
@@ -4882,7 +4882,7 @@ static int bnxt_hwrm_cfa_ntuple_filter_alloc(struct bnxt *bp,
|
||||
#endif
|
||||
|
||||
static int bnxt_hwrm_set_vnic_filter(struct bnxt *bp, u16 vnic_id, u16 idx,
|
||||
u8 *mac_addr)
|
||||
const u8 *mac_addr)
|
||||
{
|
||||
struct hwrm_cfa_l2_filter_alloc_output *resp;
|
||||
struct hwrm_cfa_l2_filter_alloc_input *req;
|
||||
|
||||
@@ -1151,7 +1151,7 @@ void bnxt_hwrm_exec_fwd_req(struct bnxt *bp)
|
||||
}
|
||||
}
|
||||
|
||||
int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
|
||||
int bnxt_approve_mac(struct bnxt *bp, const u8 *mac, bool strict)
|
||||
{
|
||||
struct hwrm_func_vf_cfg_input *req;
|
||||
int rc = 0;
|
||||
@@ -1246,7 +1246,7 @@ void bnxt_update_vf_mac(struct bnxt *bp)
|
||||
{
|
||||
}
|
||||
|
||||
int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
|
||||
int bnxt_approve_mac(struct bnxt *bp, const u8 *mac, bool strict)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -41,5 +41,5 @@ int bnxt_cfg_hw_sriov(struct bnxt *bp, int *num_vfs, bool reset);
|
||||
void bnxt_sriov_disable(struct bnxt *);
|
||||
void bnxt_hwrm_exec_fwd_req(struct bnxt *);
|
||||
void bnxt_update_vf_mac(struct bnxt *);
|
||||
int bnxt_approve_mac(struct bnxt *, u8 *, bool);
|
||||
int bnxt_approve_mac(struct bnxt *, const u8 *, bool);
|
||||
#endif
|
||||
|
||||
@@ -3239,7 +3239,7 @@ static void bcmgenet_umac_reset(struct bcmgenet_priv *priv)
|
||||
}
|
||||
|
||||
static void bcmgenet_set_hw_addr(struct bcmgenet_priv *priv,
|
||||
unsigned char *addr)
|
||||
const unsigned char *addr)
|
||||
{
|
||||
bcmgenet_umac_writel(priv, get_unaligned_be32(&addr[0]), UMAC_MAC0);
|
||||
bcmgenet_umac_writel(priv, get_unaligned_be16(&addr[4]), UMAC_MAC1);
|
||||
@@ -3537,7 +3537,7 @@ static void bcmgenet_timeout(struct net_device *dev, unsigned int txqueue)
|
||||
#define MAX_MDF_FILTER 17
|
||||
|
||||
static inline void bcmgenet_set_mdf_addr(struct bcmgenet_priv *priv,
|
||||
unsigned char *addr,
|
||||
const unsigned char *addr,
|
||||
int *i)
|
||||
{
|
||||
bcmgenet_umac_writel(priv, addr[0] << 8 | addr[1],
|
||||
|
||||
@@ -607,7 +607,7 @@ static inline void xgmac_mac_disable(void __iomem *ioaddr)
|
||||
writel(value, ioaddr + XGMAC_CONTROL);
|
||||
}
|
||||
|
||||
static void xgmac_set_mac_addr(void __iomem *ioaddr, unsigned char *addr,
|
||||
static void xgmac_set_mac_addr(void __iomem *ioaddr, const unsigned char *addr,
|
||||
int num)
|
||||
{
|
||||
u32 data;
|
||||
|
||||
@@ -117,7 +117,7 @@ struct cmac_ops {
|
||||
const struct cmac_statistics *(*statistics_update)(struct cmac *, int);
|
||||
|
||||
int (*macaddress_get)(struct cmac *, u8 mac_addr[6]);
|
||||
int (*macaddress_set)(struct cmac *, u8 mac_addr[6]);
|
||||
int (*macaddress_set)(struct cmac *, const u8 mac_addr[6]);
|
||||
};
|
||||
|
||||
typedef struct _cmac_instance cmac_instance;
|
||||
|
||||
@@ -496,7 +496,7 @@ static int pm3393_macaddress_get(struct cmac *cmac, u8 mac_addr[6])
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pm3393_macaddress_set(struct cmac *cmac, u8 ma[6])
|
||||
static int pm3393_macaddress_set(struct cmac *cmac, const u8 ma[6])
|
||||
{
|
||||
u32 val, lo, mid, hi, enabled = cmac->instance->enabled;
|
||||
|
||||
|
||||
@@ -379,7 +379,7 @@ static int mac_intr_clear(struct cmac *mac)
|
||||
}
|
||||
|
||||
/* Expect MAC address to be in network byte order. */
|
||||
static int mac_set_address(struct cmac* mac, u8 addr[6])
|
||||
static int mac_set_address(struct cmac* mac, const u8 addr[6])
|
||||
{
|
||||
u32 val;
|
||||
int port = mac->instance->index;
|
||||
|
||||
@@ -710,7 +710,7 @@ int t3_mac_enable(struct cmac *mac, int which);
|
||||
int t3_mac_disable(struct cmac *mac, int which);
|
||||
int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu);
|
||||
int t3_mac_set_rx_mode(struct cmac *mac, struct net_device *dev);
|
||||
int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6]);
|
||||
int t3_mac_set_address(struct cmac *mac, unsigned int idx, const u8 addr[6]);
|
||||
int t3_mac_set_num_ucast(struct cmac *mac, int n);
|
||||
const struct mac_stats *t3_mac_update_stats(struct cmac *mac);
|
||||
int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc);
|
||||
|
||||
@@ -240,7 +240,7 @@ static void set_addr_filter(struct cmac *mac, int idx, const u8 * addr)
|
||||
}
|
||||
|
||||
/* Set one of the station's unicast MAC addresses. */
|
||||
int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6])
|
||||
int t3_mac_set_address(struct cmac *mac, unsigned int idx, const u8 addr[6])
|
||||
{
|
||||
if (idx >= mac->nucast)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -73,9 +73,9 @@ static int enic_set_port_profile(struct enic *enic, int vf)
|
||||
struct vic_provinfo *vp;
|
||||
const u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
|
||||
const __be16 os_type = htons(VIC_GENERIC_PROV_OS_TYPE_LINUX);
|
||||
const u8 *client_mac;
|
||||
char uuid_str[38];
|
||||
char client_mac_str[18];
|
||||
u8 *client_mac;
|
||||
int err;
|
||||
|
||||
ENIC_PP_BY_INDEX(enic, vf, pp, &err);
|
||||
|
||||
@@ -567,7 +567,7 @@ static void rio_hw_init(struct net_device *dev)
|
||||
*/
|
||||
for (i = 0; i < 3; i++)
|
||||
dw16(StationAddr0 + 2 * i,
|
||||
cpu_to_le16(((u16 *)dev->dev_addr)[i]));
|
||||
cpu_to_le16(((const u16 *)dev->dev_addr)[i]));
|
||||
|
||||
set_multicast (dev);
|
||||
if (np->coalesce) {
|
||||
|
||||
@@ -60,11 +60,11 @@ static void __dnet_set_hwaddr(struct dnet *bp)
|
||||
{
|
||||
u16 tmp;
|
||||
|
||||
tmp = be16_to_cpup((__be16 *)bp->dev->dev_addr);
|
||||
tmp = be16_to_cpup((const __be16 *)bp->dev->dev_addr);
|
||||
dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
|
||||
tmp = be16_to_cpup((__be16 *)(bp->dev->dev_addr + 2));
|
||||
tmp = be16_to_cpup((const __be16 *)(bp->dev->dev_addr + 2));
|
||||
dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
|
||||
tmp = be16_to_cpup((__be16 *)(bp->dev->dev_addr + 4));
|
||||
tmp = be16_to_cpup((const __be16 *)(bp->dev->dev_addr + 4));
|
||||
dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
|
||||
}
|
||||
|
||||
|
||||
@@ -1080,7 +1080,7 @@ err:
|
||||
}
|
||||
|
||||
/* Uses synchronous MCCQ */
|
||||
int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
|
||||
int be_cmd_pmac_add(struct be_adapter *adapter, const u8 *mac_addr,
|
||||
u32 if_id, u32 *pmac_id, u32 domain)
|
||||
{
|
||||
struct be_mcc_wrb *wrb;
|
||||
|
||||
@@ -2385,7 +2385,7 @@ int be_pci_fnum_get(struct be_adapter *adapter);
|
||||
int be_fw_wait_ready(struct be_adapter *adapter);
|
||||
int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
|
||||
bool permanent, u32 if_handle, u32 pmac_id);
|
||||
int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, u32 if_id,
|
||||
int be_cmd_pmac_add(struct be_adapter *adapter, const u8 *mac_addr, u32 if_id,
|
||||
u32 *pmac_id, u32 domain);
|
||||
int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, int pmac_id,
|
||||
u32 domain);
|
||||
|
||||
@@ -272,7 +272,7 @@ void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
|
||||
iowrite32(val, adapter->db + DB_CQ_OFFSET);
|
||||
}
|
||||
|
||||
static int be_dev_mac_add(struct be_adapter *adapter, u8 *mac)
|
||||
static int be_dev_mac_add(struct be_adapter *adapter, const u8 *mac)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
||||
@@ -806,8 +806,8 @@ static int ethoc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
||||
|
||||
static void ethoc_do_set_mac_address(struct net_device *dev)
|
||||
{
|
||||
const unsigned char *mac = dev->dev_addr;
|
||||
struct ethoc *priv = netdev_priv(dev);
|
||||
unsigned char *mac = dev->dev_addr;
|
||||
|
||||
ethoc_write(priv, MAC_ADDR0, (mac[2] << 24) | (mac[3] << 16) |
|
||||
(mac[4] << 8) | (mac[5] << 0));
|
||||
|
||||
@@ -827,7 +827,7 @@ static int netdev_open(struct net_device *dev)
|
||||
return -EAGAIN;
|
||||
|
||||
for (i = 0; i < 3; i++)
|
||||
iowrite16(((unsigned short*)dev->dev_addr)[i],
|
||||
iowrite16(((const unsigned short *)dev->dev_addr)[i],
|
||||
ioaddr + PAR0 + i*2);
|
||||
|
||||
init_ring(dev);
|
||||
|
||||
@@ -272,7 +272,7 @@ static int dpaa_netdev_init(struct net_device *net_dev,
|
||||
} else {
|
||||
eth_hw_addr_random(net_dev);
|
||||
err = priv->mac_dev->change_addr(priv->mac_dev->fman_mac,
|
||||
(enet_addr_t *)net_dev->dev_addr);
|
||||
(const enet_addr_t *)net_dev->dev_addr);
|
||||
if (err) {
|
||||
dev_err(dev, "Failed to set random MAC address\n");
|
||||
return -EINVAL;
|
||||
@@ -452,7 +452,7 @@ static int dpaa_set_mac_address(struct net_device *net_dev, void *addr)
|
||||
mac_dev = priv->mac_dev;
|
||||
|
||||
err = mac_dev->change_addr(mac_dev->fman_mac,
|
||||
(enet_addr_t *)net_dev->dev_addr);
|
||||
(const enet_addr_t *)net_dev->dev_addr);
|
||||
if (err < 0) {
|
||||
netif_err(priv, drv, net_dev, "mac_dev->change_addr() = %d\n",
|
||||
err);
|
||||
|
||||
@@ -366,7 +366,7 @@ static void set_dflts(struct dtsec_cfg *cfg)
|
||||
cfg->maximum_frame = DEFAULT_MAXIMUM_FRAME;
|
||||
}
|
||||
|
||||
static void set_mac_address(struct dtsec_regs __iomem *regs, u8 *adr)
|
||||
static void set_mac_address(struct dtsec_regs __iomem *regs, const u8 *adr)
|
||||
{
|
||||
u32 tmp;
|
||||
|
||||
@@ -516,7 +516,7 @@ static int init(struct dtsec_regs __iomem *regs, struct dtsec_cfg *cfg,
|
||||
|
||||
if (addr) {
|
||||
MAKE_ENET_ADDR_FROM_UINT64(addr, eth_addr);
|
||||
set_mac_address(regs, (u8 *)eth_addr);
|
||||
set_mac_address(regs, (const u8 *)eth_addr);
|
||||
}
|
||||
|
||||
/* HASH */
|
||||
@@ -1022,7 +1022,7 @@ int dtsec_accept_rx_pause_frames(struct fman_mac *dtsec, bool en)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int dtsec_modify_mac_address(struct fman_mac *dtsec, enet_addr_t *enet_addr)
|
||||
int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_addr)
|
||||
{
|
||||
struct dtsec_regs __iomem *regs = dtsec->regs;
|
||||
enum comm_mode mode = COMM_MODE_NONE;
|
||||
@@ -1041,7 +1041,7 @@ int dtsec_modify_mac_address(struct fman_mac *dtsec, enet_addr_t *enet_addr)
|
||||
* Station address have to be swapped (big endian to little endian
|
||||
*/
|
||||
dtsec->addr = ENET_ADDR_TO_UINT64(*enet_addr);
|
||||
set_mac_address(dtsec->regs, (u8 *)(*enet_addr));
|
||||
set_mac_address(dtsec->regs, (const u8 *)(*enet_addr));
|
||||
|
||||
graceful_start(dtsec, mode);
|
||||
|
||||
|
||||
@@ -37,7 +37,7 @@
|
||||
|
||||
struct fman_mac *dtsec_config(struct fman_mac_params *params);
|
||||
int dtsec_set_promiscuous(struct fman_mac *dtsec, bool new_val);
|
||||
int dtsec_modify_mac_address(struct fman_mac *dtsec, enet_addr_t *enet_addr);
|
||||
int dtsec_modify_mac_address(struct fman_mac *dtsec, const enet_addr_t *enet_addr);
|
||||
int dtsec_adjust_link(struct fman_mac *dtsec,
|
||||
u16 speed);
|
||||
int dtsec_restart_autoneg(struct fman_mac *dtsec);
|
||||
|
||||
@@ -354,7 +354,7 @@ struct fman_mac {
|
||||
bool allmulti_enabled;
|
||||
};
|
||||
|
||||
static void add_addr_in_paddr(struct memac_regs __iomem *regs, u8 *adr,
|
||||
static void add_addr_in_paddr(struct memac_regs __iomem *regs, const u8 *adr,
|
||||
u8 paddr_num)
|
||||
{
|
||||
u32 tmp0, tmp1;
|
||||
@@ -897,12 +897,12 @@ int memac_accept_rx_pause_frames(struct fman_mac *memac, bool en)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int memac_modify_mac_address(struct fman_mac *memac, enet_addr_t *enet_addr)
|
||||
int memac_modify_mac_address(struct fman_mac *memac, const enet_addr_t *enet_addr)
|
||||
{
|
||||
if (!is_init_done(memac->memac_drv_param))
|
||||
return -EINVAL;
|
||||
|
||||
add_addr_in_paddr(memac->regs, (u8 *)(*enet_addr), 0);
|
||||
add_addr_in_paddr(memac->regs, (const u8 *)(*enet_addr), 0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1058,7 +1058,7 @@ int memac_init(struct fman_mac *memac)
|
||||
/* MAC Address */
|
||||
if (memac->addr != 0) {
|
||||
MAKE_ENET_ADDR_FROM_UINT64(memac->addr, eth_addr);
|
||||
add_addr_in_paddr(memac->regs, (u8 *)eth_addr, 0);
|
||||
add_addr_in_paddr(memac->regs, (const u8 *)eth_addr, 0);
|
||||
}
|
||||
|
||||
fixed_link = memac_drv_param->fixed_link;
|
||||
|
||||
@@ -40,7 +40,7 @@
|
||||
|
||||
struct fman_mac *memac_config(struct fman_mac_params *params);
|
||||
int memac_set_promiscuous(struct fman_mac *memac, bool new_val);
|
||||
int memac_modify_mac_address(struct fman_mac *memac, enet_addr_t *enet_addr);
|
||||
int memac_modify_mac_address(struct fman_mac *memac, const enet_addr_t *enet_addr);
|
||||
int memac_adjust_link(struct fman_mac *memac, u16 speed);
|
||||
int memac_cfg_max_frame_len(struct fman_mac *memac, u16 new_val);
|
||||
int memac_cfg_reset_on_init(struct fman_mac *memac, bool enable);
|
||||
|
||||
@@ -221,7 +221,7 @@ struct fman_mac {
|
||||
bool allmulti_enabled;
|
||||
};
|
||||
|
||||
static void set_mac_address(struct tgec_regs __iomem *regs, u8 *adr)
|
||||
static void set_mac_address(struct tgec_regs __iomem *regs, const u8 *adr)
|
||||
{
|
||||
u32 tmp0, tmp1;
|
||||
|
||||
@@ -514,13 +514,13 @@ int tgec_accept_rx_pause_frames(struct fman_mac *tgec, bool en)
|
||||
return 0;
|
||||
}
|
||||
|
||||
int tgec_modify_mac_address(struct fman_mac *tgec, enet_addr_t *p_enet_addr)
|
||||
int tgec_modify_mac_address(struct fman_mac *tgec, const enet_addr_t *p_enet_addr)
|
||||
{
|
||||
if (!is_init_done(tgec->cfg))
|
||||
return -EINVAL;
|
||||
|
||||
tgec->addr = ENET_ADDR_TO_UINT64(*p_enet_addr);
|
||||
set_mac_address(tgec->regs, (u8 *)(*p_enet_addr));
|
||||
set_mac_address(tgec->regs, (const u8 *)(*p_enet_addr));
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -704,7 +704,7 @@ int tgec_init(struct fman_mac *tgec)
|
||||
|
||||
if (tgec->addr) {
|
||||
MAKE_ENET_ADDR_FROM_UINT64(tgec->addr, eth_addr);
|
||||
set_mac_address(tgec->regs, (u8 *)eth_addr);
|
||||
set_mac_address(tgec->regs, (const u8 *)eth_addr);
|
||||
}
|
||||
|
||||
/* interrupts */
|
||||
|
||||
@@ -37,7 +37,7 @@
|
||||
|
||||
struct fman_mac *tgec_config(struct fman_mac_params *params);
|
||||
int tgec_set_promiscuous(struct fman_mac *tgec, bool new_val);
|
||||
int tgec_modify_mac_address(struct fman_mac *tgec, enet_addr_t *enet_addr);
|
||||
int tgec_modify_mac_address(struct fman_mac *tgec, const enet_addr_t *enet_addr);
|
||||
int tgec_cfg_max_frame_len(struct fman_mac *tgec, u16 new_val);
|
||||
int tgec_enable(struct fman_mac *tgec, enum comm_mode mode);
|
||||
int tgec_disable(struct fman_mac *tgec, enum comm_mode mode);
|
||||
|
||||
@@ -66,7 +66,7 @@ struct mac_device {
|
||||
int (*stop)(struct mac_device *mac_dev);
|
||||
void (*adjust_link)(struct mac_device *mac_dev);
|
||||
int (*set_promisc)(struct fman_mac *mac_dev, bool enable);
|
||||
int (*change_addr)(struct fman_mac *mac_dev, enet_addr_t *enet_addr);
|
||||
int (*change_addr)(struct fman_mac *mac_dev, const enet_addr_t *enet_addr);
|
||||
int (*set_allmulti)(struct fman_mac *mac_dev, bool enable);
|
||||
int (*set_tstamp)(struct fman_mac *mac_dev, bool enable);
|
||||
int (*set_multi)(struct net_device *net_dev,
|
||||
|
||||
@@ -427,7 +427,7 @@ static void hisi_femac_free_skb_rings(struct hisi_femac_priv *priv)
|
||||
}
|
||||
|
||||
static int hisi_femac_set_hw_mac_addr(struct hisi_femac_priv *priv,
|
||||
unsigned char *mac)
|
||||
const unsigned char *mac)
|
||||
{
|
||||
u32 reg;
|
||||
|
||||
|
||||
@@ -429,7 +429,7 @@ static void hix5hd2_port_disable(struct hix5hd2_priv *priv)
|
||||
static void hix5hd2_hw_set_mac_addr(struct net_device *dev)
|
||||
{
|
||||
struct hix5hd2_priv *priv = netdev_priv(dev);
|
||||
unsigned char *mac = dev->dev_addr;
|
||||
const unsigned char *mac = dev->dev_addr;
|
||||
u32 val;
|
||||
|
||||
val = mac[1] | (mac[0] << 8);
|
||||
|
||||
@@ -499,7 +499,7 @@ struct hnae_ae_ops {
|
||||
u32 *tx_usecs_high, u32 *rx_usecs_high);
|
||||
void (*set_promisc_mode)(struct hnae_handle *handle, u32 en);
|
||||
int (*get_mac_addr)(struct hnae_handle *handle, void **p);
|
||||
int (*set_mac_addr)(struct hnae_handle *handle, void *p);
|
||||
int (*set_mac_addr)(struct hnae_handle *handle, const void *p);
|
||||
int (*add_uc_addr)(struct hnae_handle *handle,
|
||||
const unsigned char *addr);
|
||||
int (*rm_uc_addr)(struct hnae_handle *handle,
|
||||
|
||||
@@ -207,7 +207,7 @@ static void hns_ae_fini_queue(struct hnae_queue *q)
|
||||
hns_rcb_reset_ring_hw(q);
|
||||
}
|
||||
|
||||
static int hns_ae_set_mac_address(struct hnae_handle *handle, void *p)
|
||||
static int hns_ae_set_mac_address(struct hnae_handle *handle, const void *p)
|
||||
{
|
||||
int ret;
|
||||
struct hns_mac_cb *mac_cb = hns_get_mac_cb(handle);
|
||||
|
||||
@@ -450,7 +450,7 @@ static void hns_gmac_update_stats(void *mac_drv)
|
||||
+= dsaf_read_dev(drv, GMAC_TX_PAUSE_FRAMES_REG);
|
||||
}
|
||||
|
||||
static void hns_gmac_set_mac_addr(void *mac_drv, char *mac_addr)
|
||||
static void hns_gmac_set_mac_addr(void *mac_drv, const char *mac_addr)
|
||||
{
|
||||
struct mac_driver *drv = (struct mac_driver *)mac_drv;
|
||||
|
||||
|
||||
@@ -269,7 +269,7 @@ int hns_mac_get_inner_port_num(struct hns_mac_cb *mac_cb, u8 vmid, u8 *port_num)
|
||||
*@addr:mac address
|
||||
*/
|
||||
int hns_mac_change_vf_addr(struct hns_mac_cb *mac_cb,
|
||||
u32 vmid, char *addr)
|
||||
u32 vmid, const char *addr)
|
||||
{
|
||||
int ret;
|
||||
struct mac_driver *mac_ctrl_drv = hns_mac_get_drv(mac_cb);
|
||||
|
||||
@@ -348,7 +348,7 @@ struct mac_driver {
|
||||
/*disable mac when disable nic or dsaf*/
|
||||
void (*mac_disable)(void *mac_drv, enum mac_commom_mode mode);
|
||||
/* config mac address*/
|
||||
void (*set_mac_addr)(void *mac_drv, char *mac_addr);
|
||||
void (*set_mac_addr)(void *mac_drv, const char *mac_addr);
|
||||
/*adjust mac mode of port,include speed and duplex*/
|
||||
int (*adjust_link)(void *mac_drv, enum mac_speed speed,
|
||||
u32 full_duplex);
|
||||
@@ -425,7 +425,8 @@ int hns_mac_init(struct dsaf_device *dsaf_dev);
|
||||
void mac_adjust_link(struct net_device *net_dev);
|
||||
bool hns_mac_need_adjust_link(struct hns_mac_cb *mac_cb, int speed, int duplex);
|
||||
void hns_mac_get_link_status(struct hns_mac_cb *mac_cb, u32 *link_status);
|
||||
int hns_mac_change_vf_addr(struct hns_mac_cb *mac_cb, u32 vmid, char *addr);
|
||||
int hns_mac_change_vf_addr(struct hns_mac_cb *mac_cb, u32 vmid,
|
||||
const char *addr);
|
||||
int hns_mac_set_multi(struct hns_mac_cb *mac_cb,
|
||||
u32 port_num, char *addr, bool enable);
|
||||
int hns_mac_vm_config_bc_en(struct hns_mac_cb *mac_cb, u32 vm, bool enable);
|
||||
|
||||
@@ -255,7 +255,7 @@ static void hns_xgmac_pausefrm_cfg(void *mac_drv, u32 rx_en, u32 tx_en)
|
||||
dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin);
|
||||
}
|
||||
|
||||
static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, char *mac_addr)
|
||||
static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv, const char *mac_addr)
|
||||
{
|
||||
struct mac_driver *drv = (struct mac_driver *)mac_drv;
|
||||
|
||||
|
||||
@@ -590,7 +590,7 @@ struct hnae3_ae_ops {
|
||||
u32 *tx_usecs_high, u32 *rx_usecs_high);
|
||||
|
||||
void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
|
||||
int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
|
||||
int (*set_mac_addr)(struct hnae3_handle *handle, const void *p,
|
||||
bool is_first);
|
||||
int (*do_ioctl)(struct hnae3_handle *handle,
|
||||
struct ifreq *ifr, int cmd);
|
||||
|
||||
@@ -9444,7 +9444,7 @@ int hclge_update_mac_node_for_dev_addr(struct hclge_vport *vport,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hclge_set_mac_addr(struct hnae3_handle *handle, void *p,
|
||||
static int hclge_set_mac_addr(struct hnae3_handle *handle, const void *p,
|
||||
bool is_first)
|
||||
{
|
||||
const unsigned char *new_addr = (const unsigned char *)p;
|
||||
|
||||
@@ -1349,7 +1349,7 @@ static void hclgevf_get_mac_addr(struct hnae3_handle *handle, u8 *p)
|
||||
ether_addr_copy(p, hdev->hw.mac.mac_addr);
|
||||
}
|
||||
|
||||
static int hclgevf_set_mac_addr(struct hnae3_handle *handle, void *p,
|
||||
static int hclgevf_set_mac_addr(struct hnae3_handle *handle, const void *p,
|
||||
bool is_first)
|
||||
{
|
||||
struct hclgevf_dev *hdev = hclgevf_ae_get_hdev(handle);
|
||||
|
||||
@@ -461,7 +461,7 @@ static int init586(struct net_device *dev)
|
||||
ias_cmd->cmd_cmd = swab16(CMD_IASETUP | CMD_LAST);
|
||||
ias_cmd->cmd_link = 0xffff;
|
||||
|
||||
memcpy((char *)&ias_cmd->iaddr,(char *) dev->dev_addr,ETH_ALEN);
|
||||
memcpy((char *)&ias_cmd->iaddr,(const char *) dev->dev_addr,ETH_ALEN);
|
||||
|
||||
p->scb->cbl_offset = make16(ias_cmd);
|
||||
|
||||
|
||||
@@ -437,7 +437,7 @@ static inline bool i40e_is_channel_macvlan(struct i40e_channel *ch)
|
||||
return !!ch->fwd;
|
||||
}
|
||||
|
||||
static inline u8 *i40e_channel_mac(struct i40e_channel *ch)
|
||||
static inline const u8 *i40e_channel_mac(struct i40e_channel *ch)
|
||||
{
|
||||
if (i40e_is_channel_macvlan(ch))
|
||||
return ch->fwd->netdev->dev_addr;
|
||||
|
||||
@@ -549,7 +549,7 @@ ixgb_mta_set(struct ixgb_hw *hw,
|
||||
*****************************************************************************/
|
||||
void
|
||||
ixgb_rar_set(struct ixgb_hw *hw,
|
||||
u8 *addr,
|
||||
const u8 *addr,
|
||||
u32 index)
|
||||
{
|
||||
u32 rar_low, rar_high;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user