[ARM] tegra: smp: add barrier before raising GIC IPI IRQ

since the GIC registers are device memory and the IPI data is
stored in normal memory, a simple dmb is insufficient to ensure
that the data will be visible to the IPI-receiving processor
prior to the IPI handler running

Change-Id: Idaddd9f225d00ebd3a8d656fa75c401323b80138
Signed-off-by: Gary King <gking@nvidia.com>

arch/arm/mach-tegra/include/mach/smp.h

@@ -17,6 +17,7 @@
  */
 static inline void smp_cross_call(const struct cpumask *mask)
 {
+	dsb();
 	gic_raise_softirq(mask, 1);
 }