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can: xilinx_can: fix incorrect clear of non-processed interrupts
commit2f4f0f338cupstream. xcan_interrupt() clears ERROR|RXOFLV|BSOFF|ARBLST interrupts if any of them is asserted. This does not take into account that some of them could have been asserted between interrupt status read and interrupt clear, therefore clearing them without handling them. Fix the code to only clear those interrupts that it knows are asserted and therefore going to be processed in xcan_err_interrupt(). Fixes:b1201e44f5("can: xilinx CAN controller support") Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi> Cc: Michal Simek <michal.simek@xilinx.com> Cc: <stable@vger.kernel.org> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman
parent
189c7890f3
commit
19c756e01b
@@ -938,6 +938,7 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
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struct net_device *ndev = (struct net_device *)dev_id;
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struct xcan_priv *priv = netdev_priv(ndev);
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u32 isr, ier;
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u32 isr_errors;
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/* Get the interrupt status from Xilinx CAN */
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isr = priv->read_reg(priv, XCAN_ISR_OFFSET);
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@@ -956,11 +957,10 @@ static irqreturn_t xcan_interrupt(int irq, void *dev_id)
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xcan_tx_interrupt(ndev, isr);
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/* Check for the type of error interrupt and Processing it */
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if (isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
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XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK)) {
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priv->write_reg(priv, XCAN_ICR_OFFSET, (XCAN_IXR_ERROR_MASK |
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XCAN_IXR_RXOFLW_MASK | XCAN_IXR_BSOFF_MASK |
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XCAN_IXR_ARBLST_MASK));
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isr_errors = isr & (XCAN_IXR_ERROR_MASK | XCAN_IXR_RXOFLW_MASK |
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XCAN_IXR_BSOFF_MASK | XCAN_IXR_ARBLST_MASK);
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if (isr_errors) {
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priv->write_reg(priv, XCAN_ICR_OFFSET, isr_errors);
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xcan_err_interrupt(ndev, isr);
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}
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