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https://github.com/hardkernel/linux.git
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Merge branch 'develop' of 10.10.10.29:/home/rockchip/kernel into develop
This commit is contained in:
@@ -176,15 +176,14 @@ struct rk29_nand_platform_data rk29_nand_data = {
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* author: zyw@rock-chips.com
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*****************************************************************************************/
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#define FB_ID 0
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#define FB_DISPLAY_ON_PIN INVALID_GPIO// RK29_PIN6_PD0
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//#define FB_LCD_STANDBY_PIN INVALID_GPIO
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#define FB_LCD_STANDBY_PIN RK29_PIN6_PD1
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#define FB_DISPLAY_ON_PIN RK29_PIN6_PD1
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#define FB_LCD_STANDBY_PIN RK29_PIN1_PD6
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#define FB_LCD_CABC_EN_PIN RK29_PIN6_PD2
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#define FB_MCU_FMK_PIN INVALID_GPIO
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#define FB_DISPLAY_ON_VALUE GPIO_HIGH
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//#define FB_LCD_STANDBY_VALUE GPIO_HIGH
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#define FB_LCD_STANDBY_VALUE GPIO_LOW
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#define FB_LCD_STANDBY_VALUE GPIO_HIGH
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//#define FB_LCD_STANDBY_VALUE GPIO_LOW
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static int rk29_lcd_io_init(void)
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{
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@@ -20,12 +20,19 @@ struct rk29_ipp_image
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struct rk29_ipp_req {
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struct rk29_ipp_image src0; // source0 image
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struct rk29_ipp_image dst0; // destination0 image
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struct rk29_ipp_image src1; // source1 image
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struct rk29_ipp_image dst1; // destination1 image
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//struct rk29_ipp_image src1; // source1 image
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//struct rk29_ipp_image dst1; // destination1 image
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uint32_t src_vir_w;
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uint32_t dst_vir_w;
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uint32_t timeout;
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uint32_t flag; //rotate
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/*store_clip_mode
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0:when src width is not 64-bits aligned,use dummy data make it 64-bits aligned 1:packed
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we usually set to 0
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*/
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uint8_t store_clip_mode;
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//deinterlace_enable 1:enable 0:disable
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uint8_t deinterlace_enable;
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@@ -105,6 +112,7 @@ typedef enum
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#define IPP_PROCESS_ST (0x50)
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/*ipp config*/
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#define STORE_CLIP_MODE (1<<26)
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#define DEINTERLACE_ENABLE (1<<24)
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#define ROT_ENABLE (1<<8)
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#define PRE_SCALE (1<<4)
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@@ -144,7 +144,7 @@ static struct reginfo sensor_init_data[] =
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{0x0e, 0x61},
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{0x0f, 0x4b},
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{0x16, 0x02},
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{0x1e, 0x07}, //0x27
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{0x1e, 0x17}, //0x07//0x27
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{0x21, 0x02},
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{0x22, 0x91},
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{0x29, 0x07},
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@@ -181,22 +181,22 @@ static struct reginfo sensor_init_data[] =
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{0x66, 0x05},
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{0x94, 0x10},
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{0x95, 0x12},
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{0x7a, 0x24},
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{0x7b, 0x04},
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{0x7c, 0x07},
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{0x7d, 0x12},
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{0x7e, 0x2f},
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{0x7f, 0x3f},
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{0x80, 0x4d},
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{0x81, 0x5a},
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{0x82, 0x69},
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{0x83, 0x74},
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{0x84, 0x7f},
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{0x85, 0x91},
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{0x86, 0x9e},
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{0x87, 0xbb},
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{0x88, 0xd2},
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{0x89, 0xe5},
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{0x7a, 0x20},// {0x7a, 0x24},
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{0x7b, 0x16},// {0x7b, 0x04},
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{0x7c, 0x23},// {0x7c, 0x07},
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{0x7d, 0x3c},// {0x7d, 0x12},
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{0x7e, 0x5c},// {0x7e, 0x2f},
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{0x7f, 0x69},// {0x7f, 0x3f},
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{0x80, 0x75},// {0x80, 0x4d},
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{0x81, 0x7e},// {0x81, 0x5a},
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{0x82, 0x88},// {0x82, 0x69},
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{0x83, 0x8f},// {0x83, 0x74},
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{0x84, 0x96},// {0x84, 0x7f},
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{0x85, 0xa3},// {0x85, 0x91},
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{0x86, 0xaf},// {0x86, 0x9e},
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{0x87, 0xc4},// {0x87, 0xbb},
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{0x88, 0xd7},// {0x88, 0xd2},
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{0x89, 0xe8},// {0x89, 0xe5},
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{0x43, 0x0a},
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{0x44, 0xf0},
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{0x45, 0x34},
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@@ -228,7 +228,7 @@ static struct reginfo sensor_init_data[] =
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{0x75, 0x63},
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{0x76, 0xe1},
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{0x4c, 0x00},
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{0x77, 0x01},
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{0x77, 0x04},//0x01
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{0x4b, 0x09},
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{0xc9, 0x60},
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{0x41, 0x38},
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@@ -1214,7 +1214,7 @@ static int sensor_write(struct i2c_client *client, u8 reg, u8 val)
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while ((cnt-- > 0) && (err < 0)) { /* ddl@rock-chips.com : Transfer again if transent is failed */
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err = i2c_transfer(client->adapter, msg, 1);
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udelay(50);
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if (err >= 0) {
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return 0;
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} else {
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@@ -1230,13 +1230,10 @@ static int sensor_write(struct i2c_client *client, u8 reg, u8 val)
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static int sensor_read(struct i2c_client *client, u8 reg, u8 *val)
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{
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int err,cnt;
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//u8 buf[2];
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u8 buf[1];
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struct i2c_msg msg[2];
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//buf[0] = reg >> 8;
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buf[0] = reg;
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buf[1] = reg & 0xFF;
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msg[0].addr = client->addr;
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msg[0].flags = client->flags;
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@@ -1270,7 +1267,6 @@ static int sensor_read(struct i2c_client *client, u8 reg, u8 *val)
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}
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/* write a array of registers */
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#if 1
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static int sensor_write_array(struct i2c_client *client, struct reginfo *regarray)
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{
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int err = 0, cnt;
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@@ -1311,27 +1307,24 @@ sensor_write_array_end:
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sensor_task_lock(client,0);
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return err;
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}
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#else
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static int sensor_write_array(struct i2c_client *client, struct reginfo *regarray)
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static int sensor_readchk_array(struct i2c_client *client, struct reginfo *regarray)
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{
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int err;
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int cnt;
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int i = 0;
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u8 val_read;
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char valchk;
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cnt = 0;
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valchk = 0;
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while (regarray[i].reg != 0)
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{
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err = sensor_write(client, regarray[i].reg, regarray[i].val);
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if (err != 0)
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{
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SENSOR_TR("%s..write failed current i = %d\n", SENSOR_NAME_STRING(),i);
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return err;
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}
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err = sensor_read(client, regarray[i].reg, &val_read);
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SENSOR_TR("%s..reg[0x%x]=0x%x,0x%x\n", SENSOR_NAME_STRING(),regarray[i].reg, val_read, regarray[i].val);
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sensor_read(client, regarray[i].reg, &valchk);
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if (valchk != regarray[i].val)
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SENSOR_TR("%s Reg:0x%x read(0x%x, 0x%x) error\n",SENSOR_NAME_STRING(), regarray[i].reg, regarray[i].val, valchk);
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i++;
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}
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return 0;
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}
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#endif
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static int sensor_ioctrl(struct soc_camera_device *icd,enum rk29sensor_power_cmd cmd, int on)
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{
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struct soc_camera_link *icl = to_soc_camera_link(icd);
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@@ -1343,10 +1336,12 @@ static int sensor_ioctrl(struct soc_camera_device *icd,enum rk29sensor_power_cmd
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case Sensor_PowerDown:
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{
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if (icl->powerdown) {
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if (on == 0)
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mdelay(1);
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ret = icl->powerdown(icd->pdev, on);
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if (ret == RK29_CAM_IO_SUCCESS) {
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if (on == 0) {
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mdelay(2);
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mdelay(20);
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if (icl->reset)
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icl->reset(icd->pdev);
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}
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@@ -1678,7 +1673,7 @@ static int sensor_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
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}
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else if (((set_w <= 1280) && (set_h <= 1024)) && sensor_sxga[0].reg)
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{
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winseqe_set_addr = sensor_sxga;
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winseqe_set_addr = sensor_vga; //sensor_sxga;
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set_w = 1280;
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set_h = 1024;
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}
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@@ -270,8 +270,14 @@ static int rk29_sensor_io_init(void)
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if (camera_power != INVALID_GPIO) {
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ret = gpio_request(camera_power, "camera power");
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if (ret)
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goto sensor_io_int_loop_end;
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if (ret) {
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if (i == 0) {
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goto sensor_io_int_loop_end;
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} else {
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if (camera_power != rk29_camera_platform_data.gpio_res[0].gpio_power)
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goto sensor_io_int_loop_end;
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}
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}
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rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_POWERACTIVE_MASK;
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gpio_set_value(camera_reset, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
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gpio_direction_output(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
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@@ -249,25 +249,25 @@ int ipp_check_param(const struct rk29_ipp_req *req)
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/*IPP can support up to 8191*8191 resolution in RGB format,but we limit the image size to 8190*8190 here*/
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//check src width and height
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if (unlikely((req->src0.w <16) || (req->src0.w > 8190) || (req->src0.h < 16) || (req->src0.h > 8190))) {
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ERR("invalid source resolution\n");
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printk("ipp invalid source resolution\n");
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return -EINVAL;
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}
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//check dst width and height
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if (unlikely((req->dst0.w <16) || (req->dst0.w > 2047) || (req->dst0.h < 16) || (req->dst0.h > 2047))) {
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ERR("invalid destination resolution\n");
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printk("ipp invalid destination resolution\n");
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return -EINVAL;
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}
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//check src_vir_w
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if(unlikely(req->src_vir_w < req->src0.w)){
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ERR("invalid src_vir_w\n");
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printk("ipp invalid src_vir_w\n");
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return -EINVAL;
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}
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//check dst_vir_w
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if(unlikely(req->dst_vir_w < req->dst0.w)){
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ERR("invalid dst_vir_w\n");
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printk("ipp invalid dst_vir_w\n");
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return -EINVAL;
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}
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@@ -288,7 +288,7 @@ int ipp_check_param(const struct rk29_ipp_req *req)
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//check rotate degree
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if(req->flag >= IPP_ROT_LIMIT)
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{
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ERR("rk29_ipp is not surpport rot degree!!!!\n");
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printk("rk29_ipp does not surpport rot degree!!!!\n");
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return -EINVAL;
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}
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return 0;
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@@ -862,12 +862,18 @@ int ipp_blit(const struct rk29_ipp_req *req)
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/*Configure other*/
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ipp_write((req->dst_vir_w<<16)|req->src_vir_w, IPP_IMG_VIR);
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//store clip mode always set to 1 now
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ipp_write(ipp_read(IPP_CONFIG)|(1<<26), IPP_CONFIG);//store clip mode
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//store clip mode
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if(req->store_clip_mode == 1)
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{
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ipp_write(ipp_read(IPP_CONFIG)|STORE_CLIP_MODE, IPP_CONFIG);
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}
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else
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{
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ipp_write(ipp_read(IPP_CONFIG)&(~STORE_CLIP_MODE), IPP_CONFIG);
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}
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/* Start the operation */
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ipp_write(8, IPP_INT);//
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ipp_write(8, IPP_INT);//
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dsb();
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ipp_write(1, IPP_PROCESS_ST);
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