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arm64: dts: mediatek: mt8195: Use P1 clocks for PCIe1 controller

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Despite there being some flexibility regarding the P0/P1 connections,
especially for TL and PERI, we must use P1 clocks on pcie1 otherwise
we'll be dealing with unclocked access.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221214131117.108008-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
AngeloGioacchino Del Regno
2022-12-14 14:11:16 +01:00
committed by Matthias Brugger
parent 4f5fc078ac
commit 1bd1d10d1c
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/boot/dts/mediatek/mt8195.dtsi
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@@ -1258,9 +1258,9 @@
clocks = <&infracfg_ao CLK_INFRA_AO_PCIE_PL_P_250M_P1>,
<&clk26m>,
<&infracfg_ao CLK_INFRA_AO_PCIE_TL_96M>,
<&infracfg_ao CLK_INFRA_AO_PCIE_P1_TL_96M>,
<&clk26m>,
<&infracfg_ao CLK_INFRA_AO_PCIE_PERI_26M>,
<&infracfg_ao CLK_INFRA_AO_PCIE_P1_PERI_26M>,
/* Designer has connect pcie1 with peri_mem_p0 clock */
<&pericfg_ao CLK_PERI_AO_PCIE_P0_MEM>;
clock-names = "pl_250m", "tl_26m", "tl_96m",