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deinterlace: pq: adjust cue setting for tl1 [1/1]

Browse Source 
PD#SWPL-2984

Problem:
VLSI(yanling.liu) fine-tune cue setting for TL1.

Solution:
add new setting.

Verify:
tl1

Change-Id: I99c32d994687650dc851dd2fb8c0464e8ffd21b5
Signed-off-by: Jihong Sui <jihong.sui@amlogic.com>
This commit is contained in:
Jihong Sui
2018-12-07 10:40:26 +08:00
committed by Jianxin Pan
parent d33d065a44
commit 1d3dbed185
2 changed files with 13 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/amlogic/media/deinterlace/deinterlace.c
View File

@@ -129,7 +129,7 @@ static di_dev_t *de_devp;
static dev_t di_devno;
static struct class *di_clsp;
static const char version_s[] = "2018-12-04a";
static const char version_s[] = "2018-12-07a";
static int bypass_state = 1;
static int bypass_all;

14
drivers/amlogic/media/deinterlace/nr_drv.c
View File

@@ -701,6 +701,16 @@ module_param_named(glb_fieldck_en, glb_fieldck_en, bool, 0644);
void adaptive_cue_adjust(unsigned int frame_diff, unsigned int field_diff)
{
struct CUE_PARM_s *pcue_parm = nr_param.pcue_parm;
unsigned int mask1, mask2;
if (is_meson_tl1_cpu()) {
/*value from VLSI(yanling.liu) 2018-12-07: */
mask1 = 0x50332;
mask2 = 0x00054357;
} else { /*ori value*/
mask1 = 0x50323;
mask2 = 0x00054375;
}
if (frame_diff > pcue_parm->glb_mot_framethr) {
pcue_parm->frame_count = pcue_parm->frame_count > 0 ?
@@ -725,10 +735,10 @@ void adaptive_cue_adjust(unsigned int frame_diff, unsigned int field_diff)
/* for clockfuliness clip */
if (pcue_parm->field_count >
(pcue_parm->glb_mot_fieldnum - 6)) {
Wr(NR2_CUE_MODE, 0x50323|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_MODE, mask1|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_CON_MOT_TH, 0x03010e01);
} else {
Wr(NR2_CUE_MODE, 0x00054375|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_MODE, mask2|(Rd(NR2_CUE_MODE)&0xc00));
Wr(NR2_CUE_CON_MOT_TH, 0xa03c8c3c);
}
}