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phy/rockchip: mipi-dphy: set default vod as max range for mipi cts

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Change-Id: I9788d9afa9526f8b1a0c5ebd59ef70746e75f3bf
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang
2019-01-18 16:10:48 +08:00
committed by Tao Huang
parent 85d90ab40f
commit 1dcc7058e8
1 changed files with 7 additions and 0 deletions
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7
drivers/phy/rockchip/phy-rockchip-inno-mipi-dphy.c
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@@ -104,6 +104,10 @@
/* Analog Register Part: reg0b */
#define CLOCK_LANE_VOD_RANGE_SET_MASK GENMASK(3, 0)
#define CLOCK_LANE_VOD_RANGE_SET(x) UPDATE(x, 3, 0)
#define VOD_MIN_RANGE 0x1
#define VOD_MID_RANGE 0x3
#define VOD_BIG_RANGE 0x7
#define VOD_MAX_RANGE 0xf
/* Analog Register Part: reg11 */
#define DATA_SAMPLE_PHASE_SET_MASK GENMASK(7, 6)
#define DATA_SAMPLE_PHASE_SET(x) UPDATE(x, 7, 6)
@@ -354,6 +358,9 @@ static void inno_mipi_dphy_pll_enable(struct inno_mipi_dphy *inno)
REG_FBDIV_LO_MASK, REG_FBDIV_LO(inno->pll.fbdiv));
inno_update_bits(inno, REGISTER_PART_ANALOG, 0x08,
PLL_POST_DIV_ENABLE_MASK, PLL_POST_DIV_ENABLE);
inno_update_bits(inno, REGISTER_PART_ANALOG, 0x0b,
CLOCK_LANE_VOD_RANGE_SET_MASK,
CLOCK_LANE_VOD_RANGE_SET(VOD_MAX_RANGE));
inno_update_bits(inno, REGISTER_PART_ANALOG, 0x01,
REG_LDOPD_MASK | REG_PLLPD_MASK,
REG_LDOPD_POWER_ON | REG_PLLPD_POWER_ON);