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rk312x:clk:support clk_cif set 24M
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@@ -1306,7 +1306,6 @@
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#clock-cells = <0>;
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rockchip,clkops-idx =
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<CLKOPS_RATE_MUX_DIV>;
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rockchip,flags = <CLK_SET_RATE_NO_REPARENT>;
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};
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clk_cif_out: clk_cif_out_mux {
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