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drm/amdkfd: Use same SQ prefetch setting as amdgpu
commit d56b1980d7 upstream.
0 causes instruction fetch stall at cache line boundary under some
conditions on Navi10. A non-zero prefetch is the preferred default
in any case.
Fixes soft hang in Luxmark.
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
d417026c40
commit
1e460aa735
@@ -58,8 +58,9 @@ static int update_qpd_v10(struct device_queue_manager *dqm,
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/* check if sh_mem_config register already configured */
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if (qpd->sh_mem_config == 0) {
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qpd->sh_mem_config =
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SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
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SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT;
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(SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
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SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |
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(3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT);
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#if 0
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/* TODO:
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* This shouldn't be an issue with Navi10. Verify.
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