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rk3288 lcdc: fix some compile warning

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This commit is contained in:
hjc
2014-03-12 11:50:22 +08:00
parent 9e1d7022c3
commit 1ef4f9a41c
4 changed files with 101 additions and 88 deletions
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17
drivers/video/rockchip/lcdc/rk3288_lcdc.c
View File

@@ -181,8 +181,11 @@ static int rk3288_lcdc_disable_irq(struct lcdc_device *lcdc_dev)
mdelay(1);
return 0;
}
static void rk3288_lcdc_reg_dump(struct lcdc_device *lcdc_dev)
static int rk3288_lcdc_reg_dump(struct rk_lcdc_driver *dev_drv)
{
struct lcdc_device *lcdc_dev = container_of(dev_drv,
struct lcdc_device,
driver);
int *cbase = (int *)lcdc_dev->regs;
int *regsbak = (int *)lcdc_dev->regsbak;
int i, j;
@@ -202,6 +205,7 @@ static void rk3288_lcdc_reg_dump(struct lcdc_device *lcdc_dev)
printk("%08x ", readl_relaxed(cbase + i * 4 + j));
printk("\n");
}
return 0;
}
@@ -246,7 +250,7 @@ static int rk3288_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
}
/*rk3288_lcdc_read_reg_defalut_cfg(lcdc_dev);*/
/*rk3288_lcdc_reg_dump(lcdc_dev);*/
/*rk3288_lcdc_reg_dump(dev_drv);*/
for (i = 0; i <= (0x200 >> 4); i++) {
for (j = 0; j < 4; j++)
readl_relaxed(cbase + i * 4 + j);
@@ -881,8 +885,8 @@ static int rk3288_load_screen(struct rk_lcdc_driver *dev_drv, bool initscreen)
case SCREEN_DUAL_LVDS:
mask = m_RGB_OUT_EN;
val = v_RGB_OUT_EN(1);
/*v = 1 << (3+16);
v |= (lcdc_dev->id << 3);*/
v = 1 << (3+16);
v |= (lcdc_dev->id << 3);
break;
case SCREEN_HDMI:
mask = m_HDMI_OUT_EN;
@@ -2211,7 +2215,7 @@ static ssize_t rk3288_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
h_pw_bp = hsync_len + left_margin;
v_pw_bp = vsync_len + upper_margin;
dclk_freq = screen->mode.pixclock;
rk3288_lcdc_reg_dump(lcdc_dev);
rk3288_lcdc_reg_dump(dev_drv);
spin_lock(&lcdc_dev->reg_lock);
if (lcdc_dev->clk_on) {
@@ -2374,7 +2378,7 @@ static ssize_t rk3288_lcdc_get_disp_info(struct rk_lcdc_driver *dev_drv,
dsp_info = lcdc_readl(lcdc_dev,WIN2_DSP_INFO3);
dsp_st = lcdc_readl(lcdc_dev,WIN2_DSP_ST3);
w2_3_dsp_x = dsp_info & m_WIN2_DSP_WIDTH3+1;
w2_3_dsp_x = (dsp_info & m_WIN2_DSP_WIDTH3)+1;
w2_3_dsp_y = ((dsp_info & m_WIN2_DSP_HEIGHT3)>>16)+1;
w2_3_st_x = dsp_st & m_WIN2_DSP_XST3;
w2_3_st_y = (dsp_st & m_WIN2_DSP_YST3)>>16;
@@ -2942,6 +2946,7 @@ static struct rk_lcdc_drv_ops lcdc_drv_ops = {
.set_dsp_cabc = rk3288_lcdc_set_dsp_cabc,
.set_dsp_hue = rk3288_lcdc_set_hue,
.set_dsp_bcsh_bcs = rk3288_lcdc_set_bcsh_bcs,
.dump_reg = rk3288_lcdc_reg_dump,
};
static int rk3288_lcdc_parse_irq(struct lcdc_device *lcdc_dev,unsigned int reg_val)
{

149
drivers/video/rockchip/lcdc/rk3288_lcdc.h
View File

@@ -1239,6 +1239,71 @@
#define PWM_MODE_ONE_SHOT (0x0)
#define PWM_MODE_CONTINUOUS (0x1)
#define PWM_MODE_CAPTURE (0x2)
enum lb_mode {
LB_YUV_3840X5 = 0x0,
LB_YUV_2560X8 = 0x1,
LB_RGB_3840X2 = 0x2,
LB_RGB_2560X4 = 0x3,
LB_RGB_1920X5 = 0x4,
LB_RGB_1280X8 = 0x5
};
enum sacle_up_mode {
SCALE_UP_BIL = 0x0,
SCALE_UP_BIC = 0x1
};
enum scale_down_mode {
SCALE_DOWN_BIL = 0x0,
SCALE_DOWN_AVG = 0x1
};
/*ALPHA BLENDING MODE*/
enum alpha_mode { /* Fs Fd */
AB_USER_DEFINE = 0x0,
AB_CLEAR = 0x1,/* 0 0*/
AB_SRC = 0x2,/* 1 0*/
AB_DST = 0x3,/* 0 1 */
AB_SRC_OVER = 0x4,/* 1 1-As''*/
AB_DST_OVER = 0x5,/* 1-Ad'' 1*/
AB_SRC_IN = 0x6,
AB_DST_IN = 0x7,
AB_SRC_OUT = 0x8,
AB_DST_OUT = 0x9,
AB_SRC_ATOP = 0xa,
AB_DST_ATOP = 0xb,
XOR = 0xc,
AB_SRC_OVER_GLOBAL = 0xd
}; /*alpha_blending_mode*/
enum src_alpha_mode {
AA_STRAIGHT = 0x0,
AA_INVERSE = 0x1
};/*src_alpha_mode*/
enum global_alpha_mode {
AA_GLOBAL = 0x0,
AA_PER_PIX = 0x1,
AA_PER_PIX_GLOBAL = 0x2
};/*src_global_alpha_mode*/
enum src_alpha_sel {
AA_SAT = 0x0,
AA_NO_SAT = 0x1
};/*src_alpha_sel*/
enum src_color_mode {
AA_SRC_PRE_MUL = 0x0,
AA_SRC_NO_PRE_MUL = 0x1
};/*src_color_mode*/
enum factor_mode {
AA_ZERO = 0x0,
AA_ONE = 0x1,
AA_SRC = 0x2,
AA_SRC_INVERSE = 0x3,
AA_SRC_GLOBAL = 0x4
};/*src_factor_mode && dst_factor_mode*/
struct lcdc_device{
int id;
@@ -1254,6 +1319,7 @@ struct lcdc_device{
int __iomem *dsp_lut_addr_base;
int prop; /*used for primary or extended display device*/
bool pre_init;
bool pwr18; /*if lcdc use 1.8v power supply*/
@@ -1273,13 +1339,13 @@ struct lcdc_device{
};
struct alpha_config{
u8 src_alpha_mode; /*win0_src_alpha_m0*/
u8 src_global_alpha_val; /*win0_src_global_alpha*/
u8 src_global_alpha_mode;/*win0_src_blend_m0*/
u8 src_alpha_sel; /*win0_src_alpha_cal_m0*/
u8 src_color_mode; /*win0_src_color_m0*/
u8 src_factor_mode; /*win0_src_factor_m0*/
u8 dst_factor_mode; /*win0_dst_factor_m0*/
enum src_alpha_mode src_alpha_mode; /*win0_src_alpha_m0*/
u32 src_global_alpha_val; /*win0_src_global_alpha*/
enum global_alpha_mode src_global_alpha_mode;/*win0_src_blend_m0*/
enum src_alpha_sel src_alpha_sel; /*win0_src_alpha_cal_m0*/
enum src_color_mode src_color_mode; /*win0_src_color_m0*/
enum factor_mode src_factor_mode; /*win0_src_factor_m0*/
enum factor_mode dst_factor_mode; /*win0_dst_factor_m0*/
};
static inline void lcdc_writel(struct lcdc_device *lcdc_dev,u32 offset,u32 v)
@@ -1391,7 +1457,7 @@ static inline void lcdc_cfg_done(struct lcdc_device *lcdc_dev)
/*ScaleFactor must >= dst/src, or pixels at end of line may be unused*/
/*ScaleFactor must < dst/(src-1), or dst buffer may overflow*/
/*avrg old code: ((((dst) << SCALE_FACTOR_AVRG_FIXPOINT_SHIFT))/((src) - 1)) /*hxx_chg/*src*/
/*avrg old code: ((((dst) << SCALE_FACTOR_AVRG_FIXPOINT_SHIFT))/((src) - 1)) hxx_chgsrc*/
/*modified by hpz:*/
#define GET_SCALE_FACTOR_AVRG(src, dst) ((((dst) << (SCALE_FACTOR_AVRG_FIXPOINT_SHIFT+1)))/(2*(src) - 1))
@@ -1438,71 +1504,4 @@ u32 getHardWareVSkipLines(u32 srcH, u32 dstH)
return vScaleDnMult;
}
enum lb_mode {
LB_YUV_3840X5 = 0x0,
LB_YUV_2560X8 = 0x1,
LB_RGB_3840X2 = 0x2,
LB_RGB_2560X4 = 0x3,
LB_RGB_1920X5 = 0x4,
LB_RGB_1280X8 = 0x5
};
enum sacle_up_mode {
SCALE_UP_BIL = 0x0,
SCALE_UP_BIC = 0x1
};
enum scale_down_mode {
SCALE_DOWN_BIL = 0x0,
SCALE_DOWN_AVG = 0x1
};
/*ALPHA BLENDING MODE*/
enum alpha_mode { /* Fs Fd */
AB_USER_DEFINE = 0x0,
AB_CLEAR = 0x1,/* 0 0*/
AB_SRC = 0x2,/* 1 0*/
AB_DST = 0x3,/* 0 1 */
AB_SRC_OVER = 0x4,/* 1 1-As''*/
AB_DST_OVER = 0x5,/* 1-Ad'' 1*/
AB_SRC_IN = 0x6,
AB_DST_IN = 0x7,
AB_SRC_OUT = 0x8,
AB_DST_OUT = 0x9,
AB_SRC_ATOP = 0xa,
AB_DST_ATOP = 0xb,
XOR = 0xc,
AB_SRC_OVER_GLOBAL = 0xd
}; /*alpha_blending_mode*/
enum src_alpha_mode {
AA_STRAIGHT = 0x0,
AA_INVERSE = 0x1
};/*src_alpha_mode*/
enum global_alpha_mode {
AA_GLOBAL = 0x0,
AA_PER_PIX = 0x1,
AA_PER_PIX_GLOBAL = 0x2
};/*src_global_alpha_mode*/
enum src_alpha_sel {
AA_SAT = 0x0,
AA_NO_SAT = 0x1
};/*src_alpha_sel*/
enum src_color_mode {
AA_SRC_PRE_MUL = 0x0,
AA_SRC_NO_PRE_MUL = 0x1
};/*src_color_mode*/
enum factor_mode {
AA_ZERO = 0x0,
AA_ONE = 0x1,
AA_SRC = 0x2,
AA_SRC_INVERSE = 0x3,
AA_SRC_GLOBAL = 0x4
};/*src_factor_mode && dst_factor_mode*/
#endif

18
drivers/video/rockchip/rk_fb.c
View File

@@ -125,6 +125,8 @@ static int rk_fb_data_fmt(int data_format,int bits_per_pixel)
case 16:
fb_data_fmt = RGB565;
break;
default:
break;
}
}
return fb_data_fmt;
@@ -718,7 +720,7 @@ static int rk_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
u32 yoffset = var->yoffset;
u32 xvir = var->xres_virtual;
u32 yvir = var->yres_virtual;
u8 data_format = var->nonstd&0xff;
/*u8 data_format = var->nonstd&0xff;*/
u8 pixel_width;
u32 vir_width_bit;
@@ -779,6 +781,8 @@ static int rk_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
uv_y_off = yoffset;
fix->line_length = stride<<2;
break;
default:
break;
}
// x y mirror ,jump line
@@ -811,6 +815,8 @@ static int rk_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
win->area[0].y_offset = yoffset*xvir + xoffset;
win->area[0].c_offset = yoffset*2*xvir + (xoffset<<1);
break;
default:
break;
}
win->area[0].smem_start = fix->smem_start;
win->area[0].cbr_start = fix->smem_start + xvir * yvir;
@@ -1153,6 +1159,8 @@ static int rk_fb_set_win_buffer(struct fb_info *info,
uv_y_off = yoffset;
fix->line_length = stride<<2;
break;
default:
break;
}
if(is_pic_yuv == 1){
reg_win_data->reg_area_data[0].cbr_start =
@@ -1421,12 +1429,14 @@ static int rk_fb_blank(int blank_mode, struct fb_info *info)
struct rk_lcdc_driver *dev_drv = (struct rk_lcdc_driver *)info->par;
struct fb_fix_screeninfo *fix = &info->fix;
int win_id;
#if defined(CONFIG_RK_HDMI)
struct rk_fb *rk_fb = dev_get_drvdata(info->device);
#endif
win_id = dev_drv->ops->fb_get_win_id(dev_drv, fix->id);
if (win_id < 0)
return -ENODEV;
#if defined(CONFIG_RK_HDMI)
struct rk_fb *rk_fb = dev_get_drvdata(info->device);
#if defined(CONFIG_RK_HDMI)
if ((rk_fb->disp_mode == ONE_DUAL) && (hdmi_get_hotplug() == HDMI_HPD_ACTIVED)) {
printk(KERN_INFO "hdmi is connect , not blank lcdc\n");
} else
@@ -1720,6 +1730,8 @@ if (rk_fb->disp_mode != DUAL) {
fix->line_length = stride<<2;
cblen = crlen = (xvir*yvir);
break;
default:
break;
}
// x y mirror ,jump line

5
include/linux/rk_fb.h
View File

@@ -360,6 +360,7 @@ struct rk_lcdc_drv_ops {
int (*set_dsp_cabc) (struct rk_lcdc_driver * dev_drv, int mode);
int (*set_dsp_hue) (struct rk_lcdc_driver *dev_drv,int hue);
int (*set_dsp_bcsh_bcs)(struct rk_lcdc_driver *dev_drv,int bri,int con,int sat);
int (*dump_reg) (struct rk_lcdc_driver * dev_drv);
};
struct rk_fb_area_par {
@@ -536,8 +537,4 @@ extern int rkfb_create_sysfs(struct fb_info *fbi);
extern char *get_format_string(enum data_format, char *fmt);
extern int support_uboot_display(void);
extern int rk_fb_calc_fps(struct rk_screen * screen, u32 pixclock);
extern void rk_fd_fence_wait(struct rk_lcdc_driver *dev_drv, struct sync_fence *fence);
extern void rk_fb_free_dma_buf(struct rk_fb_reg_win_data *reg_win_data);
#endif