Merge commit 'eaf92f730ff20cd514db26422c4f0094be0cdc6b'

* commit 'eaf92f730ff20cd514db26422c4f0094be0cdc6b': drm/rockchip: vop2: delete unused register for rk3576 dt-bindings: suspend: rk3506: Update suspend mode definition ARM: dts: rockchip: rk3506-evb1-v10: Add pwm regulator option for suspend ARM: dts: rockchip: rk3506g-demo-display-control: Add suspend pwrctrl pin video: rockchip: mpp: rkvdec: modify vdpu382 hw_ops ARM: dts: rockchip: rk3506: Remove Legacy suspend config arm64: dts: rockchip: rk3576: add autocs config for pclk_ddr_root ARM: dts: rockchip: rk3506g-demo-display-control: add rk960 for demo board ARM: dts: rockchip: rk3506g-demo-display-control: Change ubi.mtd id to 5 arm64: dts: rockchip: rk3576-vehicle-evb: enable ufs default Change-Id: I680c69596910d873d6cfb32a80bf680768344e14
2026-06-11 05:17:10 +09:00 · 2024-09-03 21:00:18 +08:00
parent f16642fbcb eaf92f730f
commit 214d0d8e4f
9 changed files with 118 additions and 18 deletions
--- a/arch/arm/boot/dts/rk3506-evb1-v10.dtsi
+++ b/arch/arm/boot/dts/rk3506-evb1-v10.dtsi
@@ -719,6 +719,16 @@
 };

 &rockchip_suspend {
+	rockchip,sleep-mode-config = <
+		(0
+		| RKPM_ARMOFF_DDRPD
+		| RKPM_24M_OSC_DIS
+		| RKPM_32K_CLK
+		| RKPM_32K_SRC_RC
+		| RKPM_PWM0_CH0_REGULATOR
+		)
+	>;
+
 	rockchip,apios-suspend = <
 		(0
 		| RKPM_PWREN_CORE_GPIO0A2 | RKPM_PWREN_CORE_ACT_LOW
--- a/arch/arm/boot/dts/rk3506.dtsi
+++ b/arch/arm/boot/dts/rk3506.dtsi
@@ -357,7 +357,6 @@
 			| RKPM_24M_OSC_DIS
 			| RKPM_32K_CLK
 			| RKPM_32K_SRC_RC
-			| RKPM_SLP_RC_PWM1_CH(1)
 			)
 		>;

--- a/arch/arm/boot/dts/rk3506g-demo-display-control.dts
+++ b/arch/arm/boot/dts/rk3506g-demo-display-control.dts
@@ -31,7 +31,7 @@
 	compatible = "rockchip,rk3506g-demo-display-control", "rockchip,rk3506";

 	chosen {
-		bootargs = "earlycon=uart8250,mmio32,0xff0a0000 console=ttyFIQ0 ubi.mtd=4 ubi.block=0,rootfs root=/dev/ubiblock0_0 rootfstype=squashfs rootwait snd_aloop.index=7 snd_aloop.use_raw_jiffies=1";
+		bootargs = "earlycon=uart8250,mmio32,0xff0a0000 console=ttyFIQ0 ubi.mtd=5 ubi.block=0,rootfs root=/dev/ubiblock0_0 rootfstype=squashfs rootwait snd_aloop.index=7 snd_aloop.use_raw_jiffies=1";
 	};

 	adc_keys: adc-keys {
@@ -133,6 +133,20 @@
 		};
 	};

+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
+	};
+
 	vcc3v3_lcd_n: vcc3v3-lcd0-n {
 		compatible = "regulator-fixed";
 		enable-active-high;
@@ -162,6 +176,26 @@
 		regulator-max-microvolt = <900000>;
 		vin-supply = <&vcc3v3_sys>;
 	};
+
+	wireless-bluetooth {
+		compatible = "bluetooth-platdata";
+		uart_rts_gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default", "rts_gpio";
+		pinctrl-0 = <&uart5m0_rtsn_pins>;
+		pinctrl-1 = <&uart5_gpios>;
+		BT,power_gpio = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
+
+	wireless-wlan {
+		compatible = "wlan-platdata";
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_wake_host>;
+		wifi_chip_type = "rk960";
+		WIFI,host_wake_irq = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
+		status = "okay";
+	};
 };

 &can0 {
@@ -408,6 +442,22 @@
 	};
 };

+&mmc {
+	max-frequency = <30000000>;
+	bus-width = <4>;
+	cap-sd-highspeed;
+	no-sd;
+	no-mmc;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk_pins &sdmmc_cmd_pins &sdmmc_bus4_pins>;
+	ignore-pm-notify;
+	keep-power-in-suspend;
+	non-removable;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	//sd-uhs-sdr104;
+	status = "okay";
+};
+
 &pinctrl {
 	/* usb {
 		usb_extcon_vbus: usb-extcon-vbus {
@@ -433,6 +483,13 @@
 		};
 	};

+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+
 	tp {
 		tp_gpio: tp-gpio {
 			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
@@ -445,6 +502,18 @@
 			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	wireless-bluetooth {
+		uart5_gpios: uart5-gpios {
+			rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wireless-wlan {
+		wifi_wake_host: wifi-wake-host {
+			rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
 };

 &pwm0_4ch_2 {
@@ -457,6 +526,14 @@
 	status = "okay";
 };

+&rockchip_suspend {
+	rockchip,apios-suspend = <
+		(0
+		| RKPM_PWREN_SLEEP_GPIO0C1 | RKPM_PWREN_SLEEP_ACT_HIGH
+		)
+	>;
+};
+
 &route_dsi{
 	status = "okay";
 };
@@ -487,6 +564,12 @@
 	status = "okay";
 };

+&uart5 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart5m0_xfer_pins &uart5m0_ctsn_pins>;
+	status = "okay";
+};
+
 &usb20_otg0 {
 	dr_mode = "peripheral";
 	/* vbus-supply = <&vcc5v0_otg0>;
--- a/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20.dtsi
@@ -416,6 +416,7 @@
 	vcc-supply = <&vcc_ufs_s0>;
 	vccq-supply = <&vcc1v2_ufs_vccq_s0>;
 	vccq2-supply = <&vcc1v8_ufs_vccq2_s0>;
+	status = "okay";
 };

 &u2phy0 {
--- a/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb.dtsi
@@ -416,6 +416,7 @@
 	vcc-supply = <&vcc_ufs_s0>;
 	vccq-supply = <&vcc1v2_ufs_vccq_s0>;
 	vccq2-supply = <&vcc1v8_ufs_vccq2_s0>;
+	status = "okay";
 };

 &u2phy0 {
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -750,7 +750,8 @@
 			       <28 0x00a00045 0x7001>,
 			       <29 0x00a00045 0xb001>,
 			       <30 0x00a00045 0x7001>,
-			       <31 0x00a00045 0x7001>;
+			       <31 0x00a00045 0x7001>,
+			       <59 0x00a00043 0x7003>;
 		status = "disabled";
 	};

--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
@@ -2459,7 +2459,6 @@ static const struct vop2_cluster_regs rk3576_vop_cluster0 = {
 	.afbc_enable = VOP_REG(RK3568_CLUSTER0_CTRL, 0x1, 1),
 	.enable = VOP_REG(RK3568_CLUSTER0_CTRL, 1, 0),
 	.lb_mode = VOP_REG(RK3568_CLUSTER0_CTRL, 0xf, 4),
-	.scl_lb_mode = VOP_REG(RK3568_CLUSTER0_CTRL, 0x3, 9),
 	.dma_stride_4k_disable = VOP_REG(RK3568_CLUSTER0_CTRL, 1, 29),
 	.frm_reset_en = VOP_REG(RK3568_CLUSTER0_CTRL, 1, 31),
 	.blk_size_h = VOP_REG(RK3576_CLUSTER0_DCI_BLK_SIZE, 0x1ff, 0),
@@ -2493,7 +2492,6 @@ static const struct vop2_cluster_regs rk3576_vop_cluster1 = {
 	.afbc_enable = VOP_REG(RK3568_CLUSTER1_CTRL, 0x1, 1),
 	.enable = VOP_REG(RK3568_CLUSTER1_CTRL, 1, 0),
 	.lb_mode = VOP_REG(RK3568_CLUSTER1_CTRL, 0xf, 4),
-	.scl_lb_mode = VOP_REG(RK3568_CLUSTER1_CTRL, 0x3, 9),
 	.dma_stride_4k_disable = VOP_REG(RK3568_CLUSTER1_CTRL, 1, 29),
 	.frm_reset_en = VOP_REG(RK3568_CLUSTER1_CTRL, 1, 31),
 	.src_color_ctrl = VOP_REG(RK3576_CLUSTER1_MIX_SRC_COLOR_CTRL, 0xffffffff, 0),
--- a/drivers/video/rockchip/mpp/mpp_rkvdec2.c
+++ b/drivers/video/rockchip/mpp/mpp_rkvdec2.c
@@ -1340,19 +1340,21 @@ static int rkvdec2_set_freq(struct mpp_dev *mpp,
 	return 0;
 }

-static int rkvdec2_soft_reset(struct mpp_dev *mpp)
+static int rkvdec2_vdpu382_reset(struct mpp_dev *mpp)
 {
 	int ret = 0;

 	/*
-	 * for rk3528 and rk3562
-	 * use mmu reset instead of rkvdec soft reset
+	 * only for rk3528 and rk3562
+	 * use mmu reset as soft reset
 	 * rkvdec will reset together when rkvdec_mmu force reset
 	 */
 	ret = rockchip_iommu_force_reset(mpp->dev);
-	if (ret)
-		mpp_err("soft mmu reset fail, ret %d\n", ret);
 	mpp_write(mpp, RKVDEC_REG_INT_EN, 0);
+	if (ret) {
+		mpp_err("soft mmu reset fail, ret %d\n", ret);
+		return rkvdec2_reset(mpp);
+	}

 	return ret;

@@ -1379,16 +1381,12 @@ static int rkvdec2_sip_reset(struct mpp_dev *mpp)
 int rkvdec2_reset(struct mpp_dev *mpp)
 {
 	struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp);
-	int ret = 0;

 	mpp_debug_enter();

-	/* safe reset first*/
-	ret = rkvdec2_soft_reset(mpp);
-
 	/* cru reset */
-	if (ret && dec->rst_a && dec->rst_h) {
-		mpp_err("soft reset timeout, use cru reset\n");
+	if (dec->rst_a && dec->rst_h) {
+		mpp_err("cru reset\n");
 		mpp_pmu_idle_request(mpp, true);
 		mpp_safe_reset(dec->rst_niu_a);
 		mpp_safe_reset(dec->rst_niu_h);
@@ -1474,6 +1472,15 @@ static struct mpp_hw_ops rkvdec_rk3588_hw_ops = {
 	.reset = rkvdec2_sip_reset,
 };

+static struct mpp_hw_ops rkvdec_vdpu382_hw_ops = {
+	.init = rkvdec2_init,
+	.clk_on = rkvdec2_clk_on,
+	.clk_off = rkvdec2_clk_off,
+	.get_freq = rkvdec2_get_freq,
+	.set_freq = rkvdec2_set_freq,
+	.reset = rkvdec2_vdpu382_reset,
+};
+
 static struct mpp_hw_ops rkvdec_rk3576_hw_ops = {
 	.init = rkvdec2_rk3576_init,
 	.exit = rkvdec2_rk3576_exit,
@@ -1546,7 +1553,7 @@ static const struct mpp_dev_var rkvdec_vdpu382_data = {
 	.device_type = MPP_DEVICE_RKVDEC,
 	.hw_info = &rkvdec_vdpu382_hw_info,
 	.trans_info = rkvdec_v2_trans,
-	.hw_ops = &rkvdec_v2_hw_ops,
+	.hw_ops = &rkvdec_vdpu382_hw_ops,
 	.dev_ops = &rkvdec_v2_dev_ops,
 };

--- a/include/dt-bindings/suspend/rockchip-rk3506.h
+++ b/include/dt-bindings/suspend/rockchip-rk3506.h
@@ -54,7 +54,7 @@
 #define RKPM_GPLL_ALIVE                  BIT(13)
 #define RKPM_V0PLL_ALIVE                 BIT(14)
 #define RKPM_V1PLL_ALIVE                 BIT(15)
-#define RKPM_SLP_RC_PWM1_CH(i)           ((((i) + 1) & 0xf) << 16)
+#define RKPM_GPIO4_IE_DIS                BIT(16)

 /*
 * Wakeup source: