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phy: amlogic: phy-meson-g12a-mipi-dphy-analog: fix CNTL2_DIF_TX_CTL0 value
[ Upstream commitb949193011] Use the same CNTL2_DIF_TX_CTL0 value used by the vendor, it was reported fixing timings issues. Fixes:2a56dc650e("phy: amlogic: Add G12A Analog MIPI D-PHY driver") Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230512-amlogic-v6-4-upstream-dsi-ccf-vim3-v4-10-2592c29ea263@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
836f874d43
commit
21c0eb0648
@@ -70,7 +70,7 @@ static int phy_g12a_mipi_dphy_analog_power_on(struct phy *phy)
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HHI_MIPI_CNTL1_BANDGAP);
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regmap_write(priv->regmap, HHI_MIPI_CNTL2,
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FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL0, 0x459) |
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FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL0, 0x45a) |
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FIELD_PREP(HHI_MIPI_CNTL2_DIF_TX_CTL1, 0x2680));
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reg = DSI_LANE_CLK;
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