shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-10 04:48:04 +09:00
Code Issues Packages Projects Releases Wiki Activity

cpufreq: add more syspll freq info [1/1]

Browse Source 
PD#SWPL-4035

Problem:
add more syspll freq info.

Solution:
add more syspll freq info.

Verify:
g12a_u200, verify pass

Change-Id: I3e2a587f5ebaa20126e6ad5c37bd9d2730a75125
Signed-off-by: Hong Guo <hong.guo@amlogic.com>

Conflicts:
	drivers/amlogic/clk/g12a/g12a.h
This commit is contained in:
Hong Guo
2019-01-22 14:25:58 +08:00
committed by Dongjin Kim
parent 307bf38e2d
commit 223ae73582
1 changed files with 0 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/amlogic/clk/g12a/g12a.h
View File

@@ -156,12 +156,6 @@ static const struct pll_rate_table g12a_pll_rate_table[] = {
PLL_RATE(1896000000ULL, 158, 1, 1), /*DCO=3792M*/
PLL_RATE(1908000000ULL, 159, 1, 1), /*DCO=3816M*/
PLL_RATE(1920000000ULL, 160, 1, 1), /*DCO=3840M*/
PLL_RATE(1932000000ULL, 161, 1, 1), /*DCO=3864M*/
PLL_RATE(1944000000ULL, 162, 1, 1), /*DCO=3888M*/
PLL_RATE(1956000000ULL, 163, 1, 1), /*DCO=3912M*/
PLL_RATE(1968000000ULL, 164, 1, 1), /*DCO=3936M*/
PLL_RATE(1980000000ULL, 165, 1, 1), /*DCO=3960M*/
PLL_RATE(1992000000ULL, 166, 1, 1), /*DCO=3984M*/
PLL_RATE(2004000000ULL, 167, 1, 1), /*DCO=4008M*/
PLL_RATE(2016000000ULL, 168, 1, 1), /*DCO=4032M*/
PLL_RATE(2100000000ULL, 175, 1, 1), /*DCO=4200M*/