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drm/amd/powerplay: update smu11_driver_if_arcturus.h
It guides how driver should interface with SMU in arcturus. Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -21,16 +21,15 @@
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*
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*/
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#ifndef SMU11_DRIVER_IF_ARCTURUS_H
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#define SMU11_DRIVER_IF_ARCTURUS_H
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// *** IMPORTANT ***
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// SMU TEAM: Always increment the interface version if
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// any structure is changed in this file
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#define SMU11_DRIVER_IF_VERSION 0x06
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#define SMU11_DRIVER_IF_VERSION 0x08
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#define PPTABLE_ARCTURUS_SMU_VERSION 3
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#define PPTABLE_ARCTURUS_SMU_VERSION 4
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#define NUM_GFXCLK_DPM_LEVELS 16
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#define NUM_VCLK_DPM_LEVELS 8
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@@ -40,6 +39,7 @@
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#define NUM_UCLK_DPM_LEVELS 4
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#define NUM_FCLK_DPM_LEVELS 8
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#define NUM_XGMI_LEVELS 2
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#define NUM_XGMI_PSTATE_LEVELS 4
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#define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
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#define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
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@@ -49,6 +49,7 @@
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#define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)
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#define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)
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#define MAX_XGMI_LEVEL (NUM_XGMI_LEVELS - 1)
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#define MAX_XGMI_PSTATE_LEVEL (NUM_XGMI_PSTATE_LEVELS - 1)
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// Feature Control Defines
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// DPM
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@@ -213,8 +214,8 @@
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#define WORKLOAD_PPLIB_COUNT 5
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//XGMI performance states
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#define XGMI_STATE_D0 1
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#define XGMI_STATE_D3 0
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#define XGMI_STATE_D0 1
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#define XGMI_STATE_D3 0
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#define NUM_I2C_CONTROLLERS 8
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@@ -314,7 +315,6 @@ typedef struct {
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} SwI2cRequest_t; // SW I2C Request Table
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//D3HOT sequences
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//sequence codes from spec: atlvp4p01.amd.com:1677@//gpu/doc/soc_arch/spec/feature/BACO/Navi/Navi2x/
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typedef enum {
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BACO_SEQUENCE,
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MSR_SEQUENCE,
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@@ -368,6 +368,12 @@ typedef enum {
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PPCLK_COUNT,
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} PPCLK_e;
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typedef enum {
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POWER_SOURCE_AC,
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POWER_SOURCE_DC,
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POWER_SOURCE_COUNT,
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} POWER_SOURCE_e;
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typedef enum {
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TEMP_EDGE,
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TEMP_HOTSPOT,
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@@ -568,14 +574,9 @@ typedef struct {
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uint16_t DcBtcGb[AVFS_VOLTAGE_COUNT]; // mV Q2
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uint16_t SsFmin[10]; // PPtable value to function similar to VFTFmin for SS Curve; Size is PPCLK_COUNT rounded to nearest multiple of 2
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// SECTION: XGMI
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uint8_t XgmiLinkSpeed [NUM_XGMI_LEVELS];
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uint8_t XgmiLinkWidth [NUM_XGMI_LEVELS];
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uint16_t XgmiFclkFreq [NUM_XGMI_LEVELS];
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uint16_t XgmiSocVoltage [NUM_XGMI_LEVELS];
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uint8_t XgmiDpmPstates[NUM_XGMI_LEVELS]; // 2 DPM states, high and low. 0-P0, 1-P1, 2-P2, 3-P3.
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uint8_t XgmiDpmSpare[2];
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// Temperature Dependent Vmin
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uint16_t VDDGFX_TVmin; //Celcius
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@@ -683,6 +684,13 @@ typedef struct {
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uint16_t TotalBoardPower; //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
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uint16_t BoardPadding;
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// SECTION: XGMI Training
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uint8_t XgmiLinkSpeed [NUM_XGMI_PSTATE_LEVELS];
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uint8_t XgmiLinkWidth [NUM_XGMI_PSTATE_LEVELS];
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uint16_t XgmiFclkFreq [NUM_XGMI_PSTATE_LEVELS];
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uint16_t XgmiSocVoltage [NUM_XGMI_PSTATE_LEVELS];
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uint32_t BoardReserved[10];
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// Padding for MMHUB - do not modify this
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@@ -698,7 +706,7 @@ typedef struct {
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uint16_t GfxActivityLpfTau;
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uint16_t UclkActivityLpfTau;
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uint16_t Padding;
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uint16_t SocketPowerLpfTau;
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// Padding - ignore
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uint32_t MmHubPadding[8]; // SMU internal use
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@@ -715,7 +723,7 @@ typedef struct {
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uint8_t CurrGfxVoltageOffset ;
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uint8_t CurrMemVidOffset ;
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uint8_t Padding8 ;
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uint16_t CurrSocketPower ;
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uint16_t AverageSocketPower ;
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uint16_t TemperatureEdge ;
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uint16_t TemperatureHotspot ;
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uint16_t TemperatureHBM ;
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@@ -724,23 +732,23 @@ typedef struct {
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uint16_t TemperatureVrMem ;
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uint32_t ThrottlerStatus ;
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uint16_t CurrFanSpeed ;
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uint16_t Padding16;
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uint32_t Padding[4];
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// Padding - ignore
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uint32_t MmHubPadding[7]; // SMU internal use
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} SmuMetrics_t;
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typedef struct {
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uint16_t avgPsmCount[45];
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uint16_t minPsmCount[45];
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float avgPsmVoltage[45];
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float minPsmVoltage[45];
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uint16_t avgPsmCount[75];
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uint16_t minPsmCount[75];
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float avgPsmVoltage[75];
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float minPsmVoltage[75];
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uint16_t avgScsPsmCount;
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uint16_t minScsPsmCount;
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float avgScsPsmVoltage;
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float minScsPsmVoltage;
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uint32_t MmHubPadding[6]; // SMU internal use
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uint32_t MmHubPadding[3]; // SMU internal use
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} AvfsDebugTable_t;
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typedef struct {
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