Merge branch 'develop-3.0' of ssh://10.10.10.29/rk/kernel into develop-3.0

This commit is contained in:
ywj
2012-08-17 11:33:49 +08:00
5 changed files with 124 additions and 44 deletions

View File

@@ -21,8 +21,17 @@
#ifndef __ASM_ARCH_CAMERA_RK30_H_
#define __ASM_ARCH_CAMERA_RK29_H_
#ifdef CONFIG_ARCH_RK30
#define RK29_CAM_DRV_NAME "rk-camera-rk30"
#define RK_SUPPORT_CIF0 1
#define RK_SUPPORT_CIF1 1
#endif
#ifdef CONFIG_ARCH_RK31
#define RK29_CAM_DRV_NAME "rk-camera-rk31"
#define RK_SUPPORT_CIF0 1
#define RK_SUPPORT_CIF1 0
#endif
#include <plat/rk_camera.h>
#endif

View File

@@ -854,6 +854,7 @@ static int rk_sensor_iomux(int pin)
static u64 rockchip_device_camera_dmamask = 0xffffffffUL;
#if RK_SUPPORT_CIF0
static struct resource rk_camera_resource_host_0[] = {
[0] = {
.start = RK30_CIF0_PHYS,
@@ -866,6 +867,8 @@ static struct resource rk_camera_resource_host_0[] = {
.flags = IORESOURCE_IRQ,
}
};
#endif
#if RK_SUPPORT_CIF1
static struct resource rk_camera_resource_host_1[] = {
[0] = {
.start = RK30_CIF1_PHYS,
@@ -878,7 +881,10 @@ static struct resource rk_camera_resource_host_1[] = {
.flags = IORESOURCE_IRQ,
}
};
#endif
/*platform_device : */
#if RK_SUPPORT_CIF0
struct platform_device rk_device_camera_host_0 = {
.name = RK29_CAM_DRV_NAME,
.id = RK_CAM_PLATFORM_DEV_ID_0, /* This is used to put cameras on this interface */
@@ -890,6 +896,9 @@ static struct resource rk_camera_resource_host_1[] = {
.platform_data = &rk_camera_platform_data,
}
};
#endif
#if RK_SUPPORT_CIF1
/*platform_device : */
struct platform_device rk_device_camera_host_1 = {
.name = RK29_CAM_DRV_NAME,
@@ -902,6 +911,7 @@ static struct resource rk_camera_resource_host_1[] = {
.platform_data = &rk_camera_platform_data,
}
};
#endif
static void rk_init_camera_plateform_data(void)
{
@@ -923,8 +933,8 @@ static void rk_init_camera_plateform_data(void)
static void rk30_camera_request_reserve_mem(void)
{
#ifdef CONFIG_VIDEO_RK29_WORK_IPP
#ifdef CONFIG_VIDEO_RKCIF_WORK_SIMUL_OFF
#ifdef CONFIG_VIDEO_RK29_WORK_IPP
#if defined(CONFIG_VIDEO_RKCIF_WORK_SIMUL_OFF) || ((RK_SUPPORT_CIF0 && RK_SUPPORT_CIF1) == false)
rk_camera_platform_data.meminfo.name = "camera_ipp_mem";
rk_camera_platform_data.meminfo.start = board_mem_reserve_add("camera_ipp_mem",PMEM_CAMIPP_NECESSARY);
rk_camera_platform_data.meminfo.size= PMEM_CAMIPP_NECESSARY;
@@ -958,15 +968,25 @@ static int rk_register_camera_devices(void)
for (i=0; i<RK_CAM_NUM; i++) {
if (rk_camera_platform_data.register_dev[i].device_info.name) {
if (rk_camera_platform_data.register_dev[i].link_info.bus_id == RK_CAM_PLATFORM_DEV_ID_0) {
#if RK_SUPPORT_CIF0
if (!host_registered_0) {
platform_device_register(&rk_device_camera_host_0);
host_registered_0 = 1;
}
} else if (rk_camera_platform_data.register_dev[i].link_info.bus_id == RK_CAM_PLATFORM_DEV_ID_1) {
#else
printk(KERN_ERR "%s(%d) : This chip isn't support CIF0, Please user check ...\n",__FUNCTION__,__LINE__);
#endif
}
if (rk_camera_platform_data.register_dev[i].link_info.bus_id == RK_CAM_PLATFORM_DEV_ID_1) {
#if RK_SUPPORT_CIF1
if (!host_registered_1) {
platform_device_register(&rk_device_camera_host_1);
host_registered_1 = 1;
}
#else
printk(KERN_ERR "%s(%d) : This chip isn't support CIF1, Please user check ...\n",__FUNCTION__,__LINE__);
#endif
}
}
}

View File

@@ -9,7 +9,7 @@
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifdef CONFIG_ARCH_RK30
#if defined(CONFIG_ARCH_RK2928) || defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)
#include <linux/init.h>
#include <linux/module.h>
#include <linux/io.h>
@@ -38,9 +38,16 @@
#include <media/soc_mediabus.h>
#include <mach/io.h>
#include <plat/ipp.h>
#if defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)
#include <mach/rk30_camera.h>
#include <mach/cru.h>
#include <mach/pmu.h>
#endif
#if defined(CONFIG_ARCH_RK2928)
#include <mach/rk2928_camera.h>
#endif
static int debug ;
module_param(debug, int, S_IRUGO|S_IWUSR);
@@ -140,6 +147,7 @@ module_param(debug, int, S_IRUGO|S_IWUSR);
#define ENABLE_32BIT_BYPASS (0x01<<6)
#define DISABLE_32BIT_BYPASS (0x00<<6)
#if (defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31))
//CRU,PIXCLOCK
#define CRU_PCLK_REG30 0xbc
#define ENANABLE_INVERT_PCLK_CIF0 ((0x1<<24)|(0x1<<8))
@@ -152,6 +160,7 @@ module_param(debug, int, S_IRUGO|S_IWUSR);
#define MASK_RST_CIF1 (0x01 << 31)
#define RQUEST_RST_CIF0 (0x01 << 14)
#define RQUEST_RST_CIF1 (0x01 << 15)
#endif
#define MIN(x,y) ((x<y) ? x: y)
#define MAX(x,y) ((x>y) ? x: y)
@@ -162,9 +171,18 @@ module_param(debug, int, S_IRUGO|S_IWUSR);
#define read_cif_reg(base,addr) __raw_readl(addr+(base))
#define mask_cif_reg(addr, msk, val) write_cif_reg(addr, (val)|((~(msk))&read_cif_reg(addr)))
#if (defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31))
#define write_cru_reg(addr, val) __raw_writel(val, addr+RK30_CRU_BASE)
#define read_cru_reg(addr) __raw_readl(addr+RK30_CRU_BASE)
#define mask_cru_reg(addr, msk, val) write_cru_reg(addr,(val)|((~(msk))&read_cru_reg(addr)))
#endif
#if defined(CONFIG_ARCH_RK2928)
#define write_cru_reg(addr, val)
#define read_cru_reg(addr) 0
#define mask_cru_reg(addr, msk, val)
#endif
//when work_with_ipp is not enabled,CONFIG_VIDEO_RK29_DIGITALZOOM_IPP_OFF is not defined.something wrong with it
#ifdef CONFIG_VIDEO_RK29_WORK_IPP//CONFIG_VIDEO_RK29_DIGITALZOOM_IPP_OFF
@@ -940,8 +958,9 @@ static int rk_camera_add_device(struct soc_camera_device *icd)
goto ebusy;
}
RKCAMERA_DG("RK Camera driver attached to %s\n",dev_name(icd->pdev));
dev_info(&icd->dev, "RK Camera driver attached to camera%d(%s)\n",
icd->devnum,dev_name(icd->pdev));
pcdev->frame_inval = RK_CAM_FRAME_INVAL_INIT;
pcdev->active = NULL;
pcdev->icd = NULL;
@@ -1005,7 +1024,8 @@ static void rk_camera_remove_device(struct soc_camera_device *icd)
mutex_lock(&camera_lock);
BUG_ON(icd != pcdev->icd);
RKCAMERA_DG("RK Camera driver detached from %s\n",dev_name(icd->pdev));
dev_info(&icd->dev, "RK Camera driver detached from camera%d(%s)\n",
icd->devnum,dev_name(icd->pdev));
/* ddl@rock-chips.com: Application will call VIDIOC_STREAMOFF before close device, but
stream may be turn on again before close device, if suspend and resume happened. */
@@ -1246,26 +1266,29 @@ static void rk_camera_setup_format(struct soc_camera_device *icd, __u32 host_pix
cif_fmt_val = YUV_INPUT_ORDER_YUYV(cif_fmt_val);
break;
}
#if 1
{
#ifdef CONFIG_ARCH_RK30
mdelay(100);
if(IS_CIF0()){
// pmu_set_idle_request(IDLE_REQ_VIO, true);
cru_set_soft_reset(SOFT_RST_CIF0, true);
udelay(5);
cru_set_soft_reset(SOFT_RST_CIF0, false);
// pmu_set_idle_request(IDLE_REQ_VIO, false);
{
mdelay(100);
if(IS_CIF0()){
// pmu_set_idle_request(IDLE_REQ_VIO, true);
cru_set_soft_reset(SOFT_RST_CIF0, true);
udelay(5);
cru_set_soft_reset(SOFT_RST_CIF0, false);
// pmu_set_idle_request(IDLE_REQ_VIO, false);
}else{
// pmu_set_idle_request(IDLE_REQ_VIO, true);
cru_set_soft_reset(SOFT_RST_CIF1, true);
udelay(5);
cru_set_soft_reset(SOFT_RST_CIF1, false);
// pmu_set_idle_request(IDLE_REQ_VIO, false);
}else{
// pmu_set_idle_request(IDLE_REQ_VIO, true);
cru_set_soft_reset(SOFT_RST_CIF1, true);
udelay(5);
cru_set_soft_reset(SOFT_RST_CIF1, false);
// pmu_set_idle_request(IDLE_REQ_VIO, false);
}
#endif
}
}
write_cif_reg(pcdev->base,CIF_CIF_CTRL,AXI_BURST_16|MODE_ONEFRAME|DISABLE_CAPTURE); /* ddl@rock-chips.com : vip ahb burst 16 */
write_cif_reg(pcdev->base,CIF_CIF_INTEN, 0x01|0x200); //capture complete interrupt enable
#endif
write_cif_reg(pcdev->base,CIF_CIF_FOR,cif_fmt_val); /* ddl@rock-chips.com: VIP capture mode and capture format must be set before FS register set */
// read_cif_reg(pcdev->base,CIF_CIF_INTSTAT); /* clear vip interrupte single */
@@ -2173,7 +2196,9 @@ static int rk_camera_set_ctrl(struct soc_camera_device *icd,
struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
const struct v4l2_queryctrl *qctrl;
#ifdef CONFIG_VIDEO_RK29_DIGITALZOOM_IPP_ON
struct rk_camera_dev *pcdev = ici->priv;
#endif
int ret = 0;
qctrl = rk_camera_soc_camera_find_qctrl(ici->ops, sctrl->id);
@@ -2234,6 +2259,7 @@ static struct soc_camera_host_ops rk_soc_camera_host_ops =
};
static void rk_camera_cif_iomux(int cif_index)
{
#ifdef CONFIG_ARCH_RK30
switch(cif_index){
case 0:
rk30_mux_api_set(GPIO1B3_CIF0CLKOUT_NAME, GPIO1B_CIF0_CLKOUT);
@@ -2260,6 +2286,8 @@ static void rk_camera_cif_iomux(int cif_index)
default:
printk("cif index is erro!!!\n");
}
#else
#endif
}
@@ -2271,9 +2299,18 @@ static int rk_camera_probe(struct platform_device *pdev)
int irq,i;
int err = 0;
RKCAMERA_TR("RK30 Camera driver version: v%d.%d.%d\n",(RK_CAM_VERSION_CODE&0xff0000)>>16,
(RK_CAM_VERSION_CODE&0xff00)>>8,RK_CAM_VERSION_CODE&0xff);
RKCAMERA_DG("%s(%d) Enter..\n",__FUNCTION__,__LINE__);
if ((pdev->id == RK_CAM_PLATFORM_DEV_ID_1) && (RK_SUPPORT_CIF1 == 0)) {
RKCAMERA_TR("%s(%d): This chip is not support CIF1!!\n",__FUNCTION__,__LINE__);
BUG();
}
if ((pdev->id == RK_CAM_PLATFORM_DEV_ID_0) && (RK_SUPPORT_CIF0 == 0)) {
RKCAMERA_TR("%s(%d): This chip is not support CIF0!!\n",__FUNCTION__,__LINE__);
BUG();
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
irq = platform_get_irq(pdev, 0);
if (!res || irq < 0) {
@@ -2372,7 +2409,7 @@ static int rk_camera_probe(struct platform_device *pdev)
}
}
#ifdef CONFIG_VIDEO_RK29_WORK_IPP
//#ifdef CONFIG_VIDEO_RK29_WORK_IPP
if(IS_CIF0()) {
pcdev->camera_wq = create_workqueue("rk_cam_wkque_cif0");
} else {
@@ -2380,7 +2417,7 @@ static int rk_camera_probe(struct platform_device *pdev)
}
if (pcdev->camera_wq == NULL)
goto exit_free_irq;
#endif
//#endif
pcdev->camera_reinit_work.pcdev = pcdev;
INIT_WORK(&(pcdev->camera_reinit_work.work), rk_camera_reinit_work);

View File

@@ -70,13 +70,17 @@ int debug_level = 5;
#endif
#if defined(CONFIG_ARCH_RK29)
#define RK29_SDMMC0DETECTN_GPIO RK29_PIN2_PA2
#define RK29_SDMMC0PWREN_GPIO RK29_PIN5_PD5
#define RK29_SDMMC0DETECTN_GPIO RK29_PIN2_PA2
#define RK29_SDMMC0PWREN_GPIO RK29_PIN5_PD5
#elif defined(CONFIG_ARCH_RK30)
#define RK29_SDMMC0DETECTN_GPIO RK30_PIN3_PB6
#define RK29_SDMMC0PWREN_GPIO RK30_PIN3_PA7
#define RK29_SDMMC0DETECTN_GPIO RK30_PIN3_PB6
#define RK29_SDMMC0PWREN_GPIO RK30_PIN3_PA7
#elif defined(CONFIG_ARCH_RK2928)
#define RK29_SDMMC0DETECTN_GPIO RK2928_PIN1_PC7
#define RK29_SDMMC0PWREN_GPIO RK2928_PIN1_PB6
#elif defined(CONFIG_ARCH_RK31)
#define RK29_SDMMC0DETECTN_GPIO RK30_PIN3_PB0
#define RK29_SDMMC0PWREN_GPIO RK30_PIN3_PA1
#endif
#define RK29_SDMMC_ERROR_FLAGS (SDMMC_INT_FRUN | SDMMC_INT_HLE )
@@ -1534,7 +1538,7 @@ int rk29_sdmmc_reset_controller(struct rk29_sdmmc *host)
/* reset */
#if defined(CONFIG_ARCH_RK29)
rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET ));
#elif defined(CONFIG_ARCH_RK30)
#else
rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
#endif
timeOut = 1000;
@@ -1946,7 +1950,7 @@ static void rk29_sdmmc_INT_CMD_DONE_timeout(unsigned long host_data)
if(STATE_SENDING_CMD == host->state)
{
if((0==host->cmd->retries)&&(12 != host->cmd->opcode))
if((0==host->cmd->retries)&&(12 != host->cmd->opcode)/*&&(55 != host->cmd->opcode)*/)
{
printk(KERN_WARNING "%d... cmd=%d, INT_CMD_DONE timeout, errorStep=0x%x, host->state=%x [%s]\n",\
__LINE__,host->cmd->opcode, host->errorstep,host->state,host->dma_name);
@@ -3551,12 +3555,14 @@ static int rk29_sdmmc_probe(struct platform_device *pdev)
ret = rk29_dma_config(host->dma_info.chn, 4, 16);
}
else
{
#if defined(CONFIG_ARCH_RK30)
ret = rk29_dma_config(host->dma_info.chn, 4, 16); // a unified set the burst value to 16 in RK30,noted at 2012-07-16
#else
ret = rk29_dma_config(host->dma_info.chn, 4, 1); // to maintain set this value to 1 in RK29,noted at 2012-07-16
#endif
{
#if defined(CONFIG_ARCH_RK29)
// to maintain set this value to 1 in RK29,noted at 2012-07-16
ret = rk29_dma_config(host->dma_info.chn, 4, 1);
#else
// a unified set the burst value to 16 in RK30,noted at 2012-07-16
ret = rk29_dma_config(host->dma_info.chn, 4, 16);
#endif
}
#endif
if(ret < 0)
@@ -3775,6 +3781,10 @@ static int rk29_sdmmc_sdcard_suspend(struct rk29_sdmmc *host)
rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_GPIO2A2);
#elif defined(CONFIG_ARCH_RK30)
rk29_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B6);
#elif defined(CONFIG_ARCH_RK2928)
rk29_mux_api_set(GPIO1C1_MMC0_DETN_NAME, GPIO1C_GPIO1C1);
#elif defined(CONFIG_ARCH_RK31)
rk29_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B0);
#endif
gpio_request(RK29_SDMMC0DETECTN_GPIO, "sd_detect");
@@ -3800,6 +3810,10 @@ static void rk29_sdmmc_sdcard_resume(struct rk29_sdmmc *host)
rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
#elif defined(CONFIG_ARCH_RK30)
rk29_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0_DETECT_N);
#elif defined(CONFIG_ARCH_RK2928)
rk29_mux_api_set(GPIO1C1_MMC0_DETN_NAME, GPIO1C_MMC0_DETN);
#elif defined(CONFIG_ARCH_RK31)
rk29_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0DETECTN);
#endif
}

View File

@@ -48,7 +48,7 @@
#if defined(CONFIG_ARCH_RK29)
#define SDMMC_DATA (0x100)
#elif defined(CONFIG_ARCH_RK30)
#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31) || defined(CONFIG_ARCH_RK2928)
#define SDMMC_VERID (0x06c) //Version ID register
#define SDMMC_UHS_REG (0x074) //UHS-I register
#define SDMMC_RST_n (0x078) //Hardware reset register
@@ -102,7 +102,7 @@
/* Interrupt status & mask register defines(base+0x24) */
#if defined(CONFIG_ARCH_RK29)
#define SDMMC_INT_SDIO RK2818_BIT(16) //SDIO interrupt
#elif defined(CONFIG_ARCH_RK30)
#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31) || defined(CONFIG_ARCH_RK2928)
#define SDMMC_INT_SDIO RK2818_BIT(24) //SDIO interrupt
#define SDMMC_INT_UNBUSY RK2818_BIT(16) //data no busy interrupt
#endif
@@ -181,7 +181,7 @@
#define RX_WMARK (0xF) //RX watermark level set to 15
#define TX_WMARK (0x10) //TX watermark level set to 16
#elif defined(CONFIG_ARCH_RK30)
#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31) || defined(CONFIG_ARCH_RK2928)
#define FIFO_DEPTH (0x100) //FIFO depth = 256 word
#define RX_WMARK_SHIFT (16)
#define TX_WMARK_SHIFT (0)