shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-05-31 16:26:41 +09:00
Code Issues Packages Projects Releases Wiki Activity

ARM: dt: tegra seaboard: fix I2C2 SCL rate

Browse Source 
This I2C bus is used for EDID/DDC reads and other "slow" I2C devices.
This requires a 100KHz SCL (clock) rate.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit is contained in:
Stephen Warren
2012-04-26 11:19:03 -06:00
parent b46b0b54de
commit 22bd1f7ef4
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/tegra-seaboard.dts
View File

@@ -281,7 +281,7 @@
};
i2c@7000c400 {
clock-frequency = <400000>;
clock-frequency = <100000>;
};
i2c@7000c500 {