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arm64: dts: renesas: r8a774c0: Fix register range of display node

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Since the R8A774C0 SoC uses DU{0,1} only, the register block length
should be 0x40000.

Based on commit 06585ed38b ("arm64: dts: renesas: r8a77990: Fix
register range of display node") for R-Car E3.

Fixes: 8ed3a6b223 ("arm64: dts: renesas: r8a774c0: Add display output support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven
2019-08-21 11:52:19 +02:00
parent 5eb624ebc7
commit 23ad2b4672
1 changed files with 1 additions and 1 deletions
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arch/arm64/boot/dts/renesas/r8a774c0.dtsi
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@@ -1805,7 +1805,7 @@
du: display@feb00000 {
compatible = "renesas,du-r8a774c0";
reg = <0 0xfeb00000 0 0x80000>;
reg = <0 0xfeb00000 0 0x40000>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,