arm64: dts: rockchip: Change the driver strength for rk356x gmac tx pins

Change-Id: Iebe1e0dce56cd3a115f9bc16dd3238d8c955bbe3
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu
2020-12-23 11:21:45 +08:00
committed by Tao Huang
parent 984eef7727
commit 2524d8dfa7
4 changed files with 118 additions and 24 deletions

View File

@@ -88,10 +88,10 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2
&gmac1m0_tx_bus2_level3
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk
&gmac1m0_rgmii_bus>;
&gmac1m0_rgmii_clk_level2
&gmac1m0_rgmii_bus_level3>;
tx_delay = <0x59>;
rx_delay = <0x2e>;

View File

@@ -144,10 +144,10 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2
&gmac1m0_tx_bus2_level3
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk
&gmac1m0_rgmii_bus>;
&gmac1m0_rgmii_clk_level2
&gmac1m0_rgmii_bus_level3>;
tx_delay = <0x59>;
rx_delay = <0x2e>;

View File

@@ -296,10 +296,10 @@
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2
&gmac1m0_tx_bus2_level3
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk
&gmac1m0_rgmii_bus>;
&gmac1m0_rgmii_clk_level2
&gmac1m0_rgmii_bus_level3>;
tx_delay = <0x46>;
rx_delay = <0x2f>;

View File

@@ -558,9 +558,9 @@
gmac0_tx_bus2: gmac0-tx-bus2 {
rockchip,pins =
/* gmac0_txd0 */
<2 RK_PB3 1 &pcfg_pull_none>,
<2 RK_PB3 1 &pcfg_pull_none_drv_level_2>,
/* gmac0_txd1 */
<2 RK_PB4 1 &pcfg_pull_none>,
<2 RK_PB4 1 &pcfg_pull_none_drv_level_2>,
/* gmac0_txen */
<2 RK_PB5 1 &pcfg_pull_none>;
};
@@ -570,7 +570,7 @@
/* gmac0_rxclk */
<2 RK_PA5 2 &pcfg_pull_none>,
/* gmac0_txclk */
<2 RK_PB0 2 &pcfg_pull_none>;
<2 RK_PB0 2 &pcfg_pull_none_drv_level_1>;
};
/omit-if-no-ref/
gmac0_rgmii_bus: gmac0-rgmii-bus {
@@ -580,9 +580,9 @@
/* gmac0_rxd3 */
<2 RK_PA4 2 &pcfg_pull_none>,
/* gmac0_txd2 */
<2 RK_PA6 2 &pcfg_pull_none>,
<2 RK_PA6 2 &pcfg_pull_none_drv_level_2>,
/* gmac0_txd3 */
<2 RK_PA7 2 &pcfg_pull_none>;
<2 RK_PA7 2 &pcfg_pull_none_drv_level_2>;
};
};
gmac1 {
@@ -620,9 +620,9 @@
gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
rockchip,pins =
/* gmac1_txd0m0 */
<3 RK_PB5 3 &pcfg_pull_none>,
<3 RK_PB5 3 &pcfg_pull_none_drv_level_2>,
/* gmac1_txd1m0 */
<3 RK_PB6 3 &pcfg_pull_none>,
<3 RK_PB6 3 &pcfg_pull_none_drv_level_2>,
/* gmac1_txenm0 */
<3 RK_PB7 3 &pcfg_pull_none>;
};
@@ -632,7 +632,7 @@
/* gmac1_rxclkm0 */
<3 RK_PA7 3 &pcfg_pull_none>,
/* gmac1_txclkm0 */
<3 RK_PA6 3 &pcfg_pull_none>;
<3 RK_PA6 3 &pcfg_pull_none_drv_level_1>;
};
/omit-if-no-ref/
gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
@@ -642,9 +642,9 @@
/* gmac1_rxd3m0 */
<3 RK_PA5 3 &pcfg_pull_none>,
/* gmac1_txd2m0 */
<3 RK_PA2 3 &pcfg_pull_none>,
<3 RK_PA2 3 &pcfg_pull_none_drv_level_2>,
/* gmac1_txd3m0 */
<3 RK_PA3 3 &pcfg_pull_none>;
<3 RK_PA3 3 &pcfg_pull_none_drv_level_2>;
};
/omit-if-no-ref/
gmac1m1_miim: gmac1m1-miim {
@@ -680,9 +680,9 @@
gmac1m1_tx_bus2: gmac1m1-tx-bus2 {
rockchip,pins =
/* gmac1_txd0m1 */
<4 RK_PA4 3 &pcfg_pull_none>,
<4 RK_PA4 3 &pcfg_pull_none_drv_level_2>,
/* gmac1_txd1m1 */
<4 RK_PA5 3 &pcfg_pull_none>,
<4 RK_PA5 3 &pcfg_pull_none_drv_level_2>,
/* gmac1_txenm1 */
<4 RK_PA6 3 &pcfg_pull_none>;
};
@@ -692,7 +692,7 @@
/* gmac1_rxclkm1 */
<4 RK_PA3 3 &pcfg_pull_none>,
/* gmac1_txclkm1 */
<4 RK_PA0 3 &pcfg_pull_none>;
<4 RK_PA0 3 &pcfg_pull_none_drv_level_1>;
};
/omit-if-no-ref/
gmac1m1_rgmii_bus: gmac1m1-rgmii-bus {
@@ -702,9 +702,9 @@
/* gmac1_rxd3m1 */
<4 RK_PA2 3 &pcfg_pull_none>,
/* gmac1_txd2m1 */
<3 RK_PD6 3 &pcfg_pull_none>,
<3 RK_PD6 3 &pcfg_pull_none_drv_level_2>,
/* gmac1_txd3m1 */
<3 RK_PD7 3 &pcfg_pull_none>;
<3 RK_PD7 3 &pcfg_pull_none_drv_level_2>;
};
};
gpu {
@@ -2685,6 +2685,100 @@
<4 RK_PD1 2 &pcfg_pull_up_drv_level_1>;
};
};
gmac-txd-level3 {
/omit-if-no-ref/
gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 {
rockchip,pins =
/* gmac0_txd0 */
<2 RK_PB3 1 &pcfg_pull_none_drv_level_3>,
/* gmac0_txd1 */
<2 RK_PB4 1 &pcfg_pull_none_drv_level_3>,
/* gmac0_txen */
<2 RK_PB5 1 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 {
rockchip,pins =
/* gmac0_rxd2 */
<2 RK_PA3 2 &pcfg_pull_none>,
/* gmac0_rxd3 */
<2 RK_PA4 2 &pcfg_pull_none>,
/* gmac0_txd2 */
<2 RK_PA6 2 &pcfg_pull_none_drv_level_3>,
/* gmac0_txd3 */
<2 RK_PA7 2 &pcfg_pull_none_drv_level_3>;
};
/omit-if-no-ref/
gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 {
rockchip,pins =
/* gmac1_txd0m0 */
<3 RK_PB5 3 &pcfg_pull_none_drv_level_3>,
/* gmac1_txd1m0 */
<3 RK_PB6 3 &pcfg_pull_none_drv_level_3>,
/* gmac1_txenm0 */
<3 RK_PB7 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 {
rockchip,pins =
/* gmac1_rxd2m0 */
<3 RK_PA4 3 &pcfg_pull_none>,
/* gmac1_rxd3m0 */
<3 RK_PA5 3 &pcfg_pull_none>,
/* gmac1_txd2m0 */
<3 RK_PA2 3 &pcfg_pull_none_drv_level_3>,
/* gmac1_txd3m0 */
<3 RK_PA3 3 &pcfg_pull_none_drv_level_3>;
};
/omit-if-no-ref/
gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 {
rockchip,pins =
/* gmac1_txd0m1 */
<4 RK_PA4 3 &pcfg_pull_none_drv_level_3>,
/* gmac1_txd1m1 */
<4 RK_PA5 3 &pcfg_pull_none_drv_level_3>,
/* gmac1_txenm1 */
<4 RK_PA6 3 &pcfg_pull_none>;
};
/omit-if-no-ref/
gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 {
rockchip,pins =
/* gmac1_rxd2m1 */
<4 RK_PA1 3 &pcfg_pull_none>,
/* gmac1_rxd3m1 */
<4 RK_PA2 3 &pcfg_pull_none>,
/* gmac1_txd2m1 */
<3 RK_PD6 3 &pcfg_pull_none_drv_level_3>,
/* gmac1_txd3m1 */
<3 RK_PD7 3 &pcfg_pull_none_drv_level_3>;
};
};
gmac-txc-level2 {
/omit-if-no-ref/
gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 {
rockchip,pins =
/* gmac0_rxclk */
<2 RK_PA5 2 &pcfg_pull_none>,
/* gmac0_txclk */
<2 RK_PB0 2 &pcfg_pull_none_drv_level_2>;
};
/omit-if-no-ref/
gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 {
rockchip,pins =
/* gmac1_rxclkm0 */
<3 RK_PA7 3 &pcfg_pull_none>,
/* gmac1_txclkm0 */
<3 RK_PA6 3 &pcfg_pull_none_drv_level_2>;
};
/omit-if-no-ref/
gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 {
rockchip,pins =
/* gmac1_rxclkm1 */
<4 RK_PA3 3 &pcfg_pull_none>,
/* gmac1_txclkm1 */
<4 RK_PA0 3 &pcfg_pull_none_drv_level_2>;
};
};
gpio {
/omit-if-no-ref/
tsadc_gpio: tsadc-gpio {