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rockchip:mali400:fix audis clock init with name clk_gpu_pre ,tmp disable audi mali pd
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@@ -34,7 +34,7 @@
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#include <linux/rockchip/cpu.h>
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#include <linux/rockchip/dvfs.h>
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#define GPUCLK_NAME "clk_gpu"
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#define GPUCLK_NAME "clk_gpu_pre"
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#define GPUCLK_PD_NAME "pd_gpu"
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#define GPU_MHZ 1000000
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@@ -332,7 +332,7 @@ static mali_bool init_mali_clock(void)
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if (mali_clock != 0 || mali_clock_pd != 0)
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return ret;
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#if 0
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mali_clock_pd = clk_get(NULL,GPUCLK_PD_NAME);
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if (IS_ERR(mali_clock_pd)) {
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MALI_PRINT( ("MALI Error : failed to get source mali pd\n"));
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@@ -340,7 +340,7 @@ static mali_bool init_mali_clock(void)
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goto err_gpu_clk;
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}
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clk_prepare_enable(mali_clock_pd);
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#endif
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mali_clock = clk_get_dvfs_node(GPUCLK_NAME);
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if (IS_ERR(mali_clock)) {
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MALI_PRINT( ("MALI Error : failed to get source mali clock\n"));
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@@ -359,7 +359,7 @@ static mali_bool init_mali_clock(void)
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mali_init_clock = mali_dvfs[0];
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num_clock = i;
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minuend = 1;
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MALI_PRINT(("Mali400 inside of rk3036\r\n"));
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MALI_PRINT(("Mali400 inside of rk3126\r\n"));
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mali_clk_set_rate(mali_clock, mali_init_clock);
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gpu_power_state = 1;
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@@ -369,11 +369,12 @@ static mali_bool init_mali_clock(void)
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err_gpu_clk:
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MALI_PRINT(("::clk_put:: %s mali_clock\n", __FUNCTION__));
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gpu_power_state = 0;
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#if 0
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clk_disable_unprepare(mali_clock_pd);
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#endif
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dvfs_clk_disable_unprepare(mali_clock);
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mali_clock = 0;
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mali_clock_pd = 0;
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return ret;
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}
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@@ -382,7 +383,9 @@ static mali_bool deinit_mali_clock(void)
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if (mali_clock == 0 && mali_clock_pd == 0)
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return MALI_TRUE;
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dvfs_clk_disable_unprepare(mali_clock);
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#if 0
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clk_disable_unprepare(mali_clock_pd);
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#endif
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mali_clock = 0;
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mali_clock_pd = 0;
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if(gpu_power_state)
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@@ -416,9 +419,9 @@ static struct early_suspend mali_dev_early_suspend = {
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_mali_osk_errcode_t mali_platform_init(void)
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{
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if (cpu_is_rk3036()) {
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audis_gpu_clk = clk_get(NULL,"clk_gpu");
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audis_gpu_clk = clk_get(NULL,"clk_gpu_pre");
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if (IS_ERR(mali_clock_pd)) {
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if (IS_ERR(audis_gpu_clk)) {
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MALI_PRINT( ("MALI Error : failed to get audis mali clk\n"));
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return MALI_FALSE;
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@@ -474,7 +477,9 @@ _mali_osk_errcode_t mali_power_domain_control(u32 bpower_off)
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if (cpu_is_rk3036()) {
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clk_prepare_enable(audis_gpu_clk);
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} else {
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#if 0
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clk_prepare_enable(mali_clock_pd);
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#endif
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dvfs_clk_prepare_enable(mali_clock);
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}
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gpu_power_state = 1 ;
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@@ -487,7 +492,9 @@ _mali_osk_errcode_t mali_power_domain_control(u32 bpower_off)
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clk_disable_unprepare(audis_gpu_clk);
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} else {
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dvfs_clk_disable_unprepare(mali_clock);
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#if 0
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clk_disable_unprepare(mali_clock_pd);
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#endif
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}
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gpu_power_state = 0;
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}
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