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drm: rockchip: dw-hdmi: rename vpll_clk to accommodate more platforms

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Change-Id: I6d5aaacc241add2bbd20f2e16f2b4ae798e1db6a
Signed-off-by: Shunqing Chen <csq@rock-chips.com>
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
This commit is contained in:
Shunqing Chen
2020-11-10 19:10:18 +08:00
committed by Tao Huang
parent 5e564157e3
commit 25665e043a
1 changed files with 16 additions and 11 deletions
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27
drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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@@ -69,7 +69,7 @@ struct rockchip_hdmi {
struct regmap *regmap;
struct drm_encoder encoder;
const struct rockchip_hdmi_chip_data *chip_data;
struct clk *vpll_clk;
struct clk *phyref_clk;
struct clk *grf_clk;
struct dw_hdmi *hdmi;
struct phy *phy;
@@ -196,14 +196,17 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi)
return PTR_ERR(hdmi->regmap);
}
hdmi->vpll_clk = devm_clk_get(hdmi->dev, "vpll");
if (PTR_ERR(hdmi->vpll_clk) == -ENOENT) {
hdmi->vpll_clk = NULL;
} else if (PTR_ERR(hdmi->vpll_clk) == -EPROBE_DEFER) {
hdmi->phyref_clk = devm_clk_get(hdmi->dev, "vpll");
if (PTR_ERR(hdmi->phyref_clk) == -ENOENT)
hdmi->phyref_clk = devm_clk_get(hdmi->dev, "ref");
if (PTR_ERR(hdmi->phyref_clk) == -ENOENT) {
hdmi->phyref_clk = NULL;
} else if (PTR_ERR(hdmi->phyref_clk) == -EPROBE_DEFER) {
return -EPROBE_DEFER;
} else if (IS_ERR(hdmi->vpll_clk)) {
} else if (IS_ERR(hdmi->phyref_clk)) {
DRM_DEV_ERROR(hdmi->dev, "failed to get grf clock\n");
return PTR_ERR(hdmi->vpll_clk);
return PTR_ERR(hdmi->phyref_clk);
}
hdmi->grf_clk = devm_clk_get(hdmi->dev, "grf");
@@ -260,7 +263,9 @@ static void dw_hdmi_rockchip_encoder_enable(struct drm_encoder *encoder)
if (WARN_ON(!crtc || !crtc->state))
return;
clk_set_rate(hdmi->vpll_clk, crtc->state->adjusted_mode.clock * 1000);
clk_set_rate(hdmi->phyref_clk,
crtc->state->adjusted_mode.crtc_clock * 1000);
if (hdmi->chip_data->lcdsel_grf_reg < 0)
return;
@@ -540,7 +545,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
return ret;
}
ret = clk_prepare_enable(hdmi->vpll_clk);
ret = clk_prepare_enable(hdmi->phyref_clk);
if (ret) {
DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n",
ret);
@@ -569,7 +574,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master,
if (IS_ERR(hdmi->hdmi)) {
ret = PTR_ERR(hdmi->hdmi);
drm_encoder_cleanup(encoder);
clk_disable_unprepare(hdmi->vpll_clk);
clk_disable_unprepare(hdmi->phyref_clk);
}
return ret;
@@ -581,7 +586,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master,
struct rockchip_hdmi *hdmi = dev_get_drvdata(dev);
dw_hdmi_unbind(hdmi->hdmi);
clk_disable_unprepare(hdmi->vpll_clk);
clk_disable_unprepare(hdmi->phyref_clk);
}
static const struct component_ops dw_hdmi_rockchip_ops = {