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drm/rockchip: vop2: Setup dly for vp even there is no plane
We notice there are many POST_BUF_EMPTY irq when user space enable a video port but without any attached plane. Setup dly in this situation can avoid the POST_BUF_EMPTY irq storm. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Change-Id: I907eb1737ac134dda8b2d237584c9d2f2b917b5e
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@@ -6561,21 +6561,14 @@ static void vop2_setup_port_mux(struct vop2_video_port *vp, uint16_t port_mux_cf
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spin_unlock(&vop2->reg_lock);
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}
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static void vop2_setup_layer_mixer_for_vp(struct vop2_video_port *vp,
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const struct vop2_zpos *vop2_zpos)
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static u16 vop2_calc_bg_ovl_and_port_mux(struct vop2_video_port *vp)
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{
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struct vop2_video_port *prev_vp;
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struct vop2 *vop2 = vp->vop2;
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u8 port_id = vp->id;
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const struct vop2_data *vop2_data = vop2->data;
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uint8_t nr_layers = vp->nr_layers;
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const struct vop2_zpos *zpos;
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struct vop2_win *win;
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struct vop2_layer *layer;
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u16 port_mux_cfg = 0;
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u8 port_mux;
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u8 used_layers = 0;
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u8 layer_id, win_phys_id;
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int i;
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for (i = 0; i < vop2_data->nr_vps - 1; i++) {
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@@ -6608,6 +6601,26 @@ static void vop2_setup_layer_mixer_for_vp(struct vop2_video_port *vp,
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port_mux_cfg |= 7 << (4 * (vop2->data->nr_vps - 1));
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return port_mux_cfg;
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}
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static void vop2_setup_layer_mixer_for_vp(struct vop2_video_port *vp,
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const struct vop2_zpos *vop2_zpos)
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{
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struct vop2_video_port *prev_vp;
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struct vop2 *vop2 = vp->vop2;
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u8 port_id = vp->id;
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uint8_t nr_layers = vp->nr_layers;
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const struct vop2_zpos *zpos;
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struct vop2_win *win;
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struct vop2_layer *layer;
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u8 used_layers = 0;
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u8 layer_id, win_phys_id;
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u16 port_mux_cfg;
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int i;
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port_mux_cfg = vop2_calc_bg_ovl_and_port_mux(vp);
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/*
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* Win and layer must map one by one, if a win is selected
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* by two layers, unexpected error may happen.
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@@ -6615,7 +6628,6 @@ static void vop2_setup_layer_mixer_for_vp(struct vop2_video_port *vp,
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* old win of the layer to the layer where the new win comes from.
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*
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*/
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used_layers = 0;
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for (i = 0; i < port_id; i++) {
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prev_vp = &vop2->vps[i];
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used_layers += hweight32(prev_vp->win_mask);
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@@ -6853,6 +6865,9 @@ static void vop2_crtc_atomic_begin(struct drm_crtc *crtc, struct drm_crtc_state
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}
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} else {
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vop2_calc_bg_ovl_and_port_mux(vp);
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vop2_setup_dly_for_vp(vp);
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}
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/* The pre alpha overlay of Cluster still need process in one win mode. */
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