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pinctrl:add dts definition for nandc

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luowei
2014-07-12 10:16:30 +08:00
parent 3543ddb737
commit 2a5ade78e8
2 changed files with 49 additions and 0 deletions
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47
arch/arm/boot/dts/rk3036-pinctrl.dtsi
View File

@@ -415,6 +415,53 @@
};
gpio1_nandc {
nandc_ale:nandc-ale {
rockchip,pins = <NAND_ALE>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
nandc_cle:nandc-cle {
rockchip,pins = <NAND_CLE>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
nandc_wrn:nandc-wrn {
rockchip,pins = <NAND_WRN>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
nandc_rdn:nandc-rdn {
rockchip,pins = <NAND_RDN>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
nandc_rdy:nandc-rdy {
rockchip,pins = <NAND_RDY>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
nandc_cs0:nandc-cs0 {
rockchip,pins = <NAND_CS0>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
nandc_data: nandc-data {
rockchip,pins = <NAND_D0>,
<NAND_D1>,
<NAND_D2>,
<NAND_D3>,
<NAND_D4>,
<NAND_D5>,
<NAND_D6>,
<NAND_D7>;
rockchip,pull = <VALUE_PULL_DEFAULT>;
};
};
gpio0_sdio0 {
sdio0_clk: sdio0_clk {
rockchip,pins = <MMC1_CLKOUT>;

2
arch/arm/boot/dts/rk3036.dtsi
View File

@@ -103,6 +103,8 @@
compatible = "rockchip,rk-nandc";
reg = <0x10500000 0x4000>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
//pinctrl-names = "default";
//pinctrl-0 = <&nandc_ale &nandc_cle &nandc_wrn &nandc_rdn &nandc_rdy &nandc_cs0 &nandc_data>;
nandc_id = <0>;
clocks = <&clk_nandc>, <&clk_gates5 9>, <&clk_gates10 4>;
clock-names = "clk_nandc", "g_clk_nandc", "hclk_nandc";