drm/bridge: sii902x: Only set CLK_RATIO_2X for DRM_MODE_FLAG_DBLCLK

According to sii902x datasheet, the TClkSel (Bit[7:6] of reg 0x08,
that is SII902X_TPI_PIXEL_REPETITION) selects the factor by which
the input clock must be multiplied to give output clock frequency.

Some interlace mode may not set DRM_MODE_FLAG_DBLCLK flag like 1080i,
these mode should not enable CLK_RATIO_2X.

This patch make sure we only set CLK_RATIO_2X when the mode has
DRM_MODE_FLAG_DBLCLK flag.

Change-Id: I1cc98693c9c8348667fabddc13d8f5ac4e689e09
Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
This commit is contained in:
Chaoyi Chen
2025-03-31 11:46:59 +08:00
committed by Tao Huang
parent cc082cd7b3
commit 2ace7d1fb1

View File

@@ -620,7 +620,7 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
if (ret)
goto out;
if (sii902x->mode.flags & DRM_MODE_FLAG_INTERLACE)
if (sii902x->mode.flags & DRM_MODE_FLAG_DBLCLK)
ratio = SII902X_TPI_CLK_RATIO_2X;
else
ratio = SII902X_TPI_CLK_RATIO_1X;