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drm/bridge: sii902x: Only set CLK_RATIO_2X for DRM_MODE_FLAG_DBLCLK
According to sii902x datasheet, the TClkSel (Bit[7:6] of reg 0x08, that is SII902X_TPI_PIXEL_REPETITION) selects the factor by which the input clock must be multiplied to give output clock frequency. Some interlace mode may not set DRM_MODE_FLAG_DBLCLK flag like 1080i, these mode should not enable CLK_RATIO_2X. This patch make sure we only set CLK_RATIO_2X when the mode has DRM_MODE_FLAG_DBLCLK flag. Change-Id: I1cc98693c9c8348667fabddc13d8f5ac4e689e09 Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
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@@ -620,7 +620,7 @@ static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
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if (ret)
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goto out;
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if (sii902x->mode.flags & DRM_MODE_FLAG_INTERLACE)
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if (sii902x->mode.flags & DRM_MODE_FLAG_DBLCLK)
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ratio = SII902X_TPI_CLK_RATIO_2X;
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else
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ratio = SII902X_TPI_CLK_RATIO_1X;
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