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audio: fixed pdm clk and pamaraters for fixed pll decimal mode

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PD#154040: fixed pdm record data is only DC value issue.
1. fixed pdm sys clk to 133m
2. fixed sample count according to dclk

Change-Id: Ica8a21c9877c9bf81f157e5590fd08e2860140f9
Signed-off-by: Xing Wang <xing.wang@amlogic.com>
This commit is contained in:
Xing Wang
2017-11-07 15:28:51 +08:00
committed by Jianxin Pan
parent 56136d1572
commit 2cedfd7494
13 changed files with 75 additions and 60 deletions
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6
arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
View File

@@ -818,13 +818,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_a113x_skt.dts
View File

@@ -821,13 +821,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_s400.dts
View File

@@ -994,13 +994,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_s400_v03.dts
View File

@@ -996,13 +996,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_s400emmc.dts
View File

@@ -993,13 +993,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_s400emmc_v03.dts
View File

@@ -995,13 +995,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

8
arch/arm64/boot/dts/amlogic/axg_s420.dts
View File

@@ -804,8 +804,6 @@
aml_spdif: spdif {
compatible = "amlogic, snd-spdif";
#sound-dai-cells = <0>;
spdif_from_ddr = <0>;
spdif_to_ddr = <0>;
clocks = <&clkc CLKID_MPLL0
&clkc CLKID_FCLK_DIV4
&clkaudio CLKID_AUDIO_SPDIFIN
@@ -827,13 +825,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_s420_128m.dts
View File

@@ -824,13 +824,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

6
arch/arm64/boot/dts/amlogic/axg_s420_v03.dts
View File

@@ -826,13 +826,13 @@
compatible = "amlogic, snd-pdm";
#sound-dai-cells = <0>;
clocks = <&clkaudio CLKID_AUDIO_PDM
&clkc CLKID_FCLK_DIV4
&clkc CLKID_FCLK_DIV3
&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_PDMIN0
&clkaudio CLKID_AUDIO_PDMIN1>;
clock-names = "gate",
"src_sysclk",
"src_dclk",
"sysclk_srcpll",
"dclk_srcpll",
"pdm_dclk",
"pdm_sysclk";
pinctrl-names = "pdm_pins";

56
sound/soc/amlogic/auge/pdm.c
View File

@@ -570,16 +570,15 @@ static int aml_pdm_dai_set_sysclk(struct snd_soc_dai *cpu_dai,
int clk_id, unsigned int freq, int dir)
{
struct aml_pdm *p_pdm = snd_soc_dai_get_drvdata(cpu_dai);
unsigned int pll_freq = 0, src_dclk_freq = 0;
unsigned int sysclk_srcpll_freq, dclk_srcpll_freq;
pll_freq = clk_get_rate(p_pdm->clk_pll);
src_dclk_freq = clk_get_rate(p_pdm->src_dclk);
pr_info("%s freq:%d, pll_freq:%d, src_dclk_freq=%d\n",
__func__, freq, pll_freq, src_dclk_freq);
if (src_dclk_freq == 0)
clk_set_rate(p_pdm->src_dclk, 24576000);
sysclk_srcpll_freq = clk_get_rate(p_pdm->sysclk_srcpll);
dclk_srcpll_freq = clk_get_rate(p_pdm->dclk_srcpll);
clk_set_rate(p_pdm->clk_pdm_sysclk, pll_freq/3);
clk_set_rate(p_pdm->clk_pdm_sysclk,
sysclk_srcpll_freq / 5);
if (dclk_srcpll_freq == 0)
clk_set_rate(p_pdm->dclk_srcpll, 24576000);
if (pdm_dclk == 1)
clk_set_rate(p_pdm->clk_pdm_dclk, 1024000);
@@ -620,9 +619,15 @@ int aml_pdm_dai_startup(struct snd_pcm_substream *substream,
ret = clk_prepare_enable(p_pdm->clk_gate);
/* enable clock */
ret = clk_prepare_enable(p_pdm->clk_pll);
ret = clk_prepare_enable(p_pdm->sysclk_srcpll);
if (ret) {
pr_err("Can't enable pcm clk_pll clock: %d\n", ret);
pr_err("Can't enable pcm sysclk_srcpll clock: %d\n", ret);
goto err;
}
ret = clk_prepare_enable(p_pdm->dclk_srcpll);
if (ret) {
pr_err("Can't enable pcm dclk_srcpll clock: %d\n", ret);
goto err;
}
@@ -652,7 +657,8 @@ void aml_pdm_dai_shutdown(struct snd_pcm_substream *substream,
/* disable clock and gate */
clk_disable_unprepare(p_pdm->clk_pdm_dclk);
clk_disable_unprepare(p_pdm->clk_pdm_sysclk);
clk_disable_unprepare(p_pdm->clk_pll);
clk_disable_unprepare(p_pdm->sysclk_srcpll);
clk_disable_unprepare(p_pdm->dclk_srcpll);
clk_disable_unprepare(p_pdm->clk_gate);
}
@@ -732,11 +738,19 @@ static int aml_pdm_platform_probe(struct platform_device *pdev)
return PTR_ERR(p_pdm->pdm_pins);
}
p_pdm->clk_pll = devm_clk_get(&pdev->dev, "src_sysclk");
if (IS_ERR(p_pdm->clk_pll)) {
p_pdm->sysclk_srcpll = devm_clk_get(&pdev->dev, "sysclk_srcpll");
if (IS_ERR(p_pdm->sysclk_srcpll)) {
dev_err(&pdev->dev,
"Can't retrieve pll clock\n");
ret = PTR_ERR(p_pdm->clk_pll);
ret = PTR_ERR(p_pdm->sysclk_srcpll);
goto err;
}
p_pdm->dclk_srcpll = devm_clk_get(&pdev->dev, "dclk_srcpll");
if (IS_ERR(p_pdm->dclk_srcpll)) {
dev_err(&pdev->dev,
"Can't retrieve data src clock\n");
ret = PTR_ERR(p_pdm->dclk_srcpll);
goto err;
}
@@ -748,14 +762,6 @@ static int aml_pdm_platform_probe(struct platform_device *pdev)
goto err;
}
p_pdm->src_dclk = devm_clk_get(&pdev->dev, "src_dclk");
if (IS_ERR(p_pdm->src_dclk)) {
dev_err(&pdev->dev,
"Can't retrieve data src clock\n");
ret = PTR_ERR(p_pdm->src_dclk);
goto err;
}
p_pdm->clk_pdm_dclk = devm_clk_get(&pdev->dev, "pdm_dclk");
if (IS_ERR(p_pdm->clk_pdm_dclk)) {
dev_err(&pdev->dev,
@@ -764,7 +770,7 @@ static int aml_pdm_platform_probe(struct platform_device *pdev)
goto err;
}
ret = clk_set_parent(p_pdm->clk_pdm_sysclk, p_pdm->clk_pll);
ret = clk_set_parent(p_pdm->clk_pdm_sysclk, p_pdm->sysclk_srcpll);
if (ret) {
dev_err(&pdev->dev,
"Can't set clk_pdm_sysclk parent clock\n");
@@ -772,7 +778,7 @@ static int aml_pdm_platform_probe(struct platform_device *pdev)
goto err;
}
ret = clk_set_parent(p_pdm->clk_pdm_dclk, p_pdm->src_dclk);
ret = clk_set_parent(p_pdm->clk_pdm_dclk, p_pdm->dclk_srcpll);
if (ret) {
dev_err(&pdev->dev,
"Can't set clk_pdm_dclk parent clock\n");
@@ -821,7 +827,7 @@ static int aml_pdm_platform_remove(struct platform_device *pdev)
{
struct aml_pdm *pdm_priv = dev_get_drvdata(&pdev->dev);
clk_disable_unprepare(pdm_priv->clk_pll);
clk_disable_unprepare(pdm_priv->sysclk_srcpll);
clk_disable_unprepare(pdm_priv->clk_pdm_dclk);
snd_soc_unregister_component(&pdev->dev);

8
sound/soc/amlogic/auge/pdm.h
View File

@@ -38,14 +38,15 @@
SNDRV_PCM_FMTBIT_S24_LE |\
SNDRV_PCM_FMTBIT_S32_LE)
#if 1
struct aml_pdm {
struct device *dev;
struct aml_audio_controller *actrl;
struct pinctrl *pdm_pins;
struct clk *clk_gate;
struct clk *clk_pll;
struct clk *src_dclk;
/* sel: fclk_div3(666M) */
struct clk *sysclk_srcpll;
/* consider same source with tdm, 48k(24576000) */
struct clk *dclk_srcpll;
struct clk *clk_pdm_sysclk;
struct clk *clk_pdm_dclk;
struct toddr *tddr;
@@ -56,6 +57,5 @@ struct aml_pdm {
*/
int filter_mode;
};
#endif
#endif /*__AML_PDM_H__*/

11
sound/soc/amlogic/auge/pdm_hw.c
View File

@@ -26,7 +26,6 @@
#include "iomap.h"
#include "pdm_hw_coeff.c"
extern int pdm_hcic_shift_gain;
void pdm_enable(int is_enable)
{
if (is_enable)
@@ -64,7 +63,15 @@ void aml_pdm_ctrl(
struct aml_audio_controller *actrl,
int bitdepth, int channels)
{
int mode, i, ch_mask = 0, sample_count = 23;
int mode, i, ch_mask = 0, sample_count;
/* sameple count */
if (pdm_dclk == 1)
sample_count = 38;
else if (pdm_dclk == 2)
sample_count = 48;
else
sample_count = 18;
if (bitdepth == 32)
mode = 0;

4
sound/soc/amlogic/auge/pdm_hw.h
View File

@@ -32,4 +32,8 @@ extern void aml_pdm_filter_ctrl(int osr, int set);
extern void pdm_enable(int is_enable);
extern void pdm_fifo_reset(void);
extern int pdm_hcic_shift_gain;
extern int pdm_dclk;
#endif /*__AML_PDM_HW_H__*/