UPSTREAM: ARM: dts: rockchip: fix MIPI interrupt on rk3288

This isn't currently used by the driver but the correct value is 19
since DSIHOST0 is 51 in the TRM and the GIC offset requires 32 to be
subtracted.

Change-Id: I81ad5143296227aa0cd67f7d33e23db6ecc6cf35
Signed-off-by: John Keeping <john@metanate.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 5415ba4065)
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
This commit is contained in:
John Keeping
2016-02-23 13:40:59 +00:00
committed by Huang, Tao
parent 9d6c273f92
commit 2d5def6c5a

View File

@@ -1250,7 +1250,7 @@
mipi_dsi: mipi@ff960000 {
compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
reg = <0xff960000 0x4000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
clock-names = "ref", "pclk";
power-domains = <&power RK3288_PD_VIO>;