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arm64: dts: rockchip: Add RK3562 evaluation board devicetree
evb1: LPDDR4/LPDDR4X + RK817 + ECM MIC evb2: DDR4 + RK809 + RTC IC with external BAT + SPI Flash + MEMS MIC The rk3562-evb1 and rk3562-evb2 force the maximum-speed of usb dwc3 controller to high-speed, it needs the following two properties to fix usb compatibility issues. 1. Set "snps,dis_u2_susphy_quirk" to disable dwc3 controller suspend phy automatically. And the usb phy driver can manage phy suspend/normal mode by itself. 2. Set "snps,usb2-lpm-disable" to disable usb2 lpm for dwc3 xhci controller. It can fix some usb disks with lpm broken issue. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Li Huang <putin.li@rock-chips.com> Signed-off-by: shengfei Xu <xsf@rock-chips.com> Signed-off-by: Guochun Huang <hero.huang@rock-chips.com> Signed-off-by: Chandler Chen <chandler.chen@rock-chips.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: William Wu <william.wu@rock-chips.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com> Signed-off-by: Jake Wu <jake.wu@rock-chips.com> Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com> Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Signed-off-by: Sandy Huang <hjc@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Signed-off-by: Binyuan Lan <lby@rock-chips.com> Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Signed-off-by: Alex Zhao <zzc@rock-chips.com> Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Felix Zeng <felix.zeng@rock-chips.com> Signed-off-by: Wangqiang Guo <kay.guo@rock-chips.com> Change-Id: I066b6daa6d0f36ff0b28564f07f4d371c2796fd6
This commit is contained in:
@@ -73,6 +73,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb2-ddr3-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb3-lp4x-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-evb4-ddr4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-iotest-lp3-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb1-lp4x-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb1-lp4x-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-ddr4-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3562-evb2-ddr4-v10-linux.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb-mipitest-v10.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb1-ddr4-v10.dtb
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100
arch/arm64/boot/dts/rockchip/rk3562-android.dtsi
Normal file
100
arch/arm64/boot/dts/rockchip/rk3562-android.dtsi
Normal file
@@ -0,0 +1,100 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff210000 console=ttyFIQ0";
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <0>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0m0_xfer>;
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status = "okay";
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};
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firmware {
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optee: optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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drm_logo: drm-logo@00000000 {
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compatible = "rockchip,drm-logo";
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reg = <0x0 0x0 0x0 0x0>;
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};
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drm_cubic_lut: drm-cubic-lut@00000000 {
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compatible = "rockchip,drm-cubic-lut";
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reg = <0x0 0x0 0x0 0x0>;
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};
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ramoops: ramoops@110000 {
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compatible = "ramoops";
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/* 0x110000 to 0x1f0000 is for ramoops */
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reg = <0x0 0x110000 0x0 0xe0000>;
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boot-log-size = <0x8000>; /* do not change */
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boot-log-count = <0x1>; /* do not change */
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console-size = <0x80000>;
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pmsg-size = <0x30000>;
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ftrace-size = <0x00000>;
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record-size = <0x14000>;
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};
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};
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};
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&display_subsystem {
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memory-region = <&drm_logo>, <&drm_cubic_lut>;
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memory-region-names = "drm-logo", "drm-cubic-lut";
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/* devfreq = <&dmc>; */
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route {
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route_dsi: route-dsi {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp0_out_dsi>;
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};
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route_lvds: route-lvds {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp0_out_lvds>;
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};
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route_rgb: route-rgb {
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status = "disabled";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp1_out_rgb>;
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};
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};
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};
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&vop {
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support-multi-area;
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};
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&rng {
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status = "okay";
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};
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583
arch/arm64/boot/dts/rockchip/rk3562-evb.dtsi
Normal file
583
arch/arm64/boot/dts/rockchip/rk3562-evb.dtsi
Normal file
@@ -0,0 +1,583 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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#include <dt-bindings/display/drm_mipi_dsi.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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/ {
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adc_keys: adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc0 1>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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vol-up-key {
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linux,code = <KEY_VOLUMEUP>;
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label = "volume up";
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press-threshold-microvolt = <17000>;
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};
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vol-down-key {
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linux,code = <KEY_VOLUMEDOWN>;
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label = "volume down";
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press-threshold-microvolt = <414000>;
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};
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menu-key {
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linux,code = <KEY_MENU>;
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label = "menu";
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press-threshold-microvolt = <800000>;
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};
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back-key {
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linux,code = <KEY_BACK>;
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label = "back";
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press-threshold-microvolt = <1200000>;
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};
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm5 0 25000 0>;
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brightness-levels = <
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0 20 20 21 21 22 22 23
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23 24 24 25 25 26 26 27
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27 28 28 29 29 30 30 31
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31 32 32 33 33 34 34 35
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35 36 36 37 37 38 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255
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>;
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default-brightness-level = <200>;
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};
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pdm_codec: dummy-codec {
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status = "okay";
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compatible = "rockchip,dummy-codec";
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#sound-dai-cells = <0>;
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};
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pdm_mic_array: pdm-mic-array {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,name = "rockchip,pdm-mic-array";
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simple-audio-card,cpu {
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sound-dai = <&pdm>;
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};
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simple-audio-card,codec {
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sound-dai = <&pdm_codec>;
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};
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};
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spdif_out: spdif-out {
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status = "okay";
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compatible = "linux,spdif-dit";
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#sound-dai-cells = <0>;
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};
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spdif-sound {
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status = "okay";
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compatible = "simple-audio-card";
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simple-audio-card,name = "rk-spdif-sound";
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simple-audio-card,cpu {
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sound-dai = <&spdif_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&spdif_out>;
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};
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};
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test-power {
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status = "okay";
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};
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vcc3v3_lcd_n: vcc3v3-lcd0-n {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_lcd_n";
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regulator-boot-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&display_subsystem {
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status = "okay";
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};
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&dsi {
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status = "disabled";
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//rockchip,lane-rate = <1000>;
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dsi_panel: panel@0 {
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status = "okay";
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compatible = "simple-panel-dsi";
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reg = <0>;
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backlight = <&backlight>;
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reset-delay-ms = <60>;
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enable-delay-ms = <60>;
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prepare-delay-ms = <60>;
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unprepare-delay-ms = <60>;
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disable-delay-ms = <60>;
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dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
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MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
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dsi,format = <MIPI_DSI_FMT_RGB888>;
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dsi,lanes = <4>;
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panel-init-sequence = [
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23 00 02 FE 21
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23 00 02 04 00
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23 00 02 00 64
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23 00 02 2A 00
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23 00 02 26 64
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23 00 02 54 00
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23 00 02 50 64
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23 00 02 7B 00
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23 00 02 77 64
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23 00 02 A2 00
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23 00 02 9D 64
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23 00 02 C9 00
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23 00 02 C5 64
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23 00 02 01 71
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23 00 02 27 71
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23 00 02 51 71
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23 00 02 78 71
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23 00 02 9E 71
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23 00 02 C6 71
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23 00 02 02 89
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23 00 02 28 89
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23 00 02 52 89
|
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23 00 02 79 89
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23 00 02 9F 89
|
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23 00 02 C7 89
|
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23 00 02 03 9E
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23 00 02 29 9E
|
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23 00 02 53 9E
|
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23 00 02 7A 9E
|
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23 00 02 A0 9E
|
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23 00 02 C8 9E
|
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23 00 02 09 00
|
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23 00 02 05 B0
|
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23 00 02 31 00
|
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23 00 02 2B B0
|
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23 00 02 5A 00
|
||||
23 00 02 55 B0
|
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23 00 02 80 00
|
||||
23 00 02 7C B0
|
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23 00 02 A7 00
|
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23 00 02 A3 B0
|
||||
23 00 02 CE 00
|
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23 00 02 CA B0
|
||||
23 00 02 06 C0
|
||||
23 00 02 2D C0
|
||||
23 00 02 56 C0
|
||||
23 00 02 7D C0
|
||||
23 00 02 A4 C0
|
||||
23 00 02 CB C0
|
||||
23 00 02 07 CF
|
||||
23 00 02 2F CF
|
||||
23 00 02 58 CF
|
||||
23 00 02 7E CF
|
||||
23 00 02 A5 CF
|
||||
23 00 02 CC CF
|
||||
23 00 02 08 DD
|
||||
23 00 02 30 DD
|
||||
23 00 02 59 DD
|
||||
23 00 02 7F DD
|
||||
23 00 02 A6 DD
|
||||
23 00 02 CD DD
|
||||
23 00 02 0E 15
|
||||
23 00 02 0A E9
|
||||
23 00 02 36 15
|
||||
23 00 02 32 E9
|
||||
23 00 02 5F 15
|
||||
23 00 02 5B E9
|
||||
23 00 02 85 15
|
||||
23 00 02 81 E9
|
||||
23 00 02 AD 15
|
||||
23 00 02 A9 E9
|
||||
23 00 02 D3 15
|
||||
23 00 02 CF E9
|
||||
23 00 02 0B 14
|
||||
23 00 02 33 14
|
||||
23 00 02 5C 14
|
||||
23 00 02 82 14
|
||||
23 00 02 AA 14
|
||||
23 00 02 D0 14
|
||||
23 00 02 0C 36
|
||||
23 00 02 34 36
|
||||
23 00 02 5D 36
|
||||
23 00 02 83 36
|
||||
23 00 02 AB 36
|
||||
23 00 02 D1 36
|
||||
23 00 02 0D 6B
|
||||
23 00 02 35 6B
|
||||
23 00 02 5E 6B
|
||||
23 00 02 84 6B
|
||||
23 00 02 AC 6B
|
||||
23 00 02 D2 6B
|
||||
23 00 02 13 5A
|
||||
23 00 02 0F 94
|
||||
23 00 02 3B 5A
|
||||
23 00 02 37 94
|
||||
23 00 02 64 5A
|
||||
23 00 02 60 94
|
||||
23 00 02 8A 5A
|
||||
23 00 02 86 94
|
||||
23 00 02 B2 5A
|
||||
23 00 02 AE 94
|
||||
23 00 02 D8 5A
|
||||
23 00 02 D4 94
|
||||
23 00 02 10 D1
|
||||
23 00 02 38 D1
|
||||
23 00 02 61 D1
|
||||
23 00 02 87 D1
|
||||
23 00 02 AF D1
|
||||
23 00 02 D5 D1
|
||||
23 00 02 11 04
|
||||
23 00 02 39 04
|
||||
23 00 02 62 04
|
||||
23 00 02 88 04
|
||||
23 00 02 B0 04
|
||||
23 00 02 D6 04
|
||||
23 00 02 12 05
|
||||
23 00 02 3A 05
|
||||
23 00 02 63 05
|
||||
23 00 02 89 05
|
||||
23 00 02 B1 05
|
||||
23 00 02 D7 05
|
||||
23 00 02 18 AA
|
||||
23 00 02 14 36
|
||||
23 00 02 42 AA
|
||||
23 00 02 3D 36
|
||||
23 00 02 69 AA
|
||||
23 00 02 65 36
|
||||
23 00 02 8F AA
|
||||
23 00 02 8B 36
|
||||
23 00 02 B7 AA
|
||||
23 00 02 B3 36
|
||||
23 00 02 DD AA
|
||||
23 00 02 D9 36
|
||||
23 00 02 15 74
|
||||
23 00 02 3F 74
|
||||
23 00 02 66 74
|
||||
23 00 02 8C 74
|
||||
23 00 02 B4 74
|
||||
23 00 02 DA 74
|
||||
23 00 02 16 9F
|
||||
23 00 02 40 9F
|
||||
23 00 02 67 9F
|
||||
23 00 02 8D 9F
|
||||
23 00 02 B5 9F
|
||||
23 00 02 DB 9F
|
||||
23 00 02 17 DC
|
||||
23 00 02 41 DC
|
||||
23 00 02 68 DC
|
||||
23 00 02 8E DC
|
||||
23 00 02 B6 DC
|
||||
23 00 02 DC DC
|
||||
23 00 02 1D FF
|
||||
23 00 02 19 03
|
||||
23 00 02 47 FF
|
||||
23 00 02 43 03
|
||||
23 00 02 6E FF
|
||||
23 00 02 6A 03
|
||||
23 00 02 94 FF
|
||||
23 00 02 90 03
|
||||
23 00 02 BC FF
|
||||
23 00 02 B8 03
|
||||
23 00 02 E2 FF
|
||||
23 00 02 DE 03
|
||||
23 00 02 1A 35
|
||||
23 00 02 44 35
|
||||
23 00 02 6B 35
|
||||
23 00 02 91 35
|
||||
23 00 02 B9 35
|
||||
23 00 02 DF 35
|
||||
23 00 02 1B 45
|
||||
23 00 02 45 45
|
||||
23 00 02 6C 45
|
||||
23 00 02 92 45
|
||||
23 00 02 BA 45
|
||||
23 00 02 E0 45
|
||||
23 00 02 1C 55
|
||||
23 00 02 46 55
|
||||
23 00 02 6D 55
|
||||
23 00 02 93 55
|
||||
23 00 02 BB 55
|
||||
23 00 02 E1 55
|
||||
23 00 02 22 FF
|
||||
23 00 02 1E 68
|
||||
23 00 02 4C FF
|
||||
23 00 02 48 68
|
||||
23 00 02 73 FF
|
||||
23 00 02 6F 68
|
||||
23 00 02 99 FF
|
||||
23 00 02 95 68
|
||||
23 00 02 C1 FF
|
||||
23 00 02 BD 68
|
||||
23 00 02 E7 FF
|
||||
23 00 02 E3 68
|
||||
23 00 02 1F 7E
|
||||
23 00 02 49 7E
|
||||
23 00 02 70 7E
|
||||
23 00 02 96 7E
|
||||
23 00 02 BE 7E
|
||||
23 00 02 E4 7E
|
||||
23 00 02 20 97
|
||||
23 00 02 4A 97
|
||||
23 00 02 71 97
|
||||
23 00 02 97 97
|
||||
23 00 02 BF 97
|
||||
23 00 02 E5 97
|
||||
23 00 02 21 B5
|
||||
23 00 02 4B B5
|
||||
23 00 02 72 B5
|
||||
23 00 02 98 B5
|
||||
23 00 02 C0 B5
|
||||
23 00 02 E6 B5
|
||||
23 00 02 25 F0
|
||||
23 00 02 23 E8
|
||||
23 00 02 4F F0
|
||||
23 00 02 4D E8
|
||||
23 00 02 76 F0
|
||||
23 00 02 74 E8
|
||||
23 00 02 9C F0
|
||||
23 00 02 9A E8
|
||||
23 00 02 C4 F0
|
||||
23 00 02 C2 E8
|
||||
23 00 02 EA F0
|
||||
23 00 02 E8 E8
|
||||
23 00 02 24 FF
|
||||
23 00 02 4E FF
|
||||
23 00 02 75 FF
|
||||
23 00 02 9B FF
|
||||
23 00 02 C3 FF
|
||||
23 00 02 E9 FF
|
||||
23 00 02 FE 3D
|
||||
23 00 02 00 04
|
||||
23 00 02 FE 23
|
||||
23 00 02 08 82
|
||||
23 00 02 0A 00
|
||||
23 00 02 0B 00
|
||||
23 00 02 0C 01
|
||||
23 00 02 16 00
|
||||
23 00 02 18 02
|
||||
23 00 02 1B 04
|
||||
23 00 02 19 04
|
||||
23 00 02 1C 81
|
||||
23 00 02 1F 00
|
||||
23 00 02 20 03
|
||||
23 00 02 23 04
|
||||
23 00 02 21 01
|
||||
23 00 02 54 63
|
||||
23 00 02 55 54
|
||||
23 00 02 6E 45
|
||||
23 00 02 6D 36
|
||||
23 00 02 FE 3D
|
||||
23 00 02 55 78
|
||||
23 00 02 FE 20
|
||||
23 00 02 26 30
|
||||
23 00 02 FE 3D
|
||||
23 00 02 20 71
|
||||
23 00 02 50 8F
|
||||
23 00 02 51 8F
|
||||
23 00 02 FE 00
|
||||
23 00 02 35 00
|
||||
05 78 01 11
|
||||
05 1E 01 29
|
||||
];
|
||||
|
||||
panel-exit-sequence = [
|
||||
05 00 01 28
|
||||
05 00 01 10
|
||||
];
|
||||
|
||||
disp_timings0: display-timings {
|
||||
native-mode = <&dsi_timing0>;
|
||||
dsi_timing0: timing0 {
|
||||
clock-frequency = <132000000>;
|
||||
hactive = <1080>;
|
||||
vactive = <1920>;
|
||||
hfront-porch = <15>;
|
||||
hsync-len = <2>;
|
||||
hback-porch = <30>;
|
||||
vfront-porch = <15>;
|
||||
vsync-len = <2>;
|
||||
vback-porch = <15>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in_dsi: endpoint {
|
||||
remote-endpoint = <&dsi_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi_out_panel: endpoint {
|
||||
remote-endpoint = <&panel_in_dsi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&gpu {
|
||||
status = "okay";
|
||||
mali-supply = <&vdd_gpu>;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
gt1x: gt1x@14 {
|
||||
compatible = "goodix,gt1x";
|
||||
reg = <0x14>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&touch_gpio>;
|
||||
goodix,rst-gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
goodix,irq-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
|
||||
/*
|
||||
* power-supply should switche to vcc3v3_lcd1_n
|
||||
* when mipi panel is connected to dsi1.
|
||||
*/
|
||||
power-supply = <&vcc3v3_lcd_n>;
|
||||
};
|
||||
};
|
||||
|
||||
&jpegd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&jpegd_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mpp_srv {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
touch {
|
||||
touch_gpio: touch-gpio {
|
||||
rockchip,pins =
|
||||
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>,
|
||||
<0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rknpu {
|
||||
rknpu-supply = <&vdd_npu>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rknpu_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rga2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rga2_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvdec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvdec_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvenc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvenc_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc0 {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
non-removable;
|
||||
max-frequency = <200000000>;
|
||||
mmc-hs400-1_8v;
|
||||
mmc-hs400-enhanced-strobe;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3562-evb1-lp4x-v10.dtsi"
|
||||
#include "rk3562-linux.dtsi"
|
||||
#include "rk3562-rk817.dtsi"
|
||||
9
arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10.dts
Normal file
9
arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10.dts
Normal file
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3562-evb1-lp4x-v10.dtsi"
|
||||
#include "rk3562-android.dtsi"
|
||||
#include "rk3562-rk817.dtsi"
|
||||
460
arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10.dtsi
Normal file
460
arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10.dtsi
Normal file
@@ -0,0 +1,460 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "dt-bindings/usb/pd.h"
|
||||
#include "rk3562.dtsi"
|
||||
#include "rk3562-evb.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/sensor-dev.h>
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3562 EVB1 LP4X V10 Board";
|
||||
compatible = "rockchip,rk3562-evb1-lp4x-v10", "rockchip,rk3562";
|
||||
|
||||
dc_12v: dc-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dc_12v";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
rk817_sound: rk817-sound {
|
||||
status = "okay";
|
||||
compatible = "rockchip,multicodecs-card";
|
||||
rockchip,card-name = "rockchip-rk817";
|
||||
hp-det-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
|
||||
rockchip,format = "i2s";
|
||||
rockchip,mclk-fs = <256>;
|
||||
rockchip,cpu = <&sai0>;
|
||||
rockchip,codec = <&rk817_codec>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hp_det>;
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&rk817 1>;
|
||||
clock-names = "ext_clock";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h>;
|
||||
|
||||
/*
|
||||
* On the module itself this is one of these (depending
|
||||
* on the actual card populated):
|
||||
* - SDIO_RESET_L_WL_REG_ON
|
||||
* - PDN (power down when low)
|
||||
*/
|
||||
post-power-on-delay-ms = <200>;
|
||||
reset-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie20: vcc3v3-pcie20 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie20";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <5000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
vcc5v0_usb_host: vcc5v0-usb-host {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usb_host";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&dcdc_boost>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb_host_pwren>;
|
||||
};
|
||||
|
||||
vbat_3v8: vbat-3v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vbat_3v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3800000>;
|
||||
regulator-max-microvolt = <3800000>;
|
||||
};
|
||||
|
||||
vcc_sd: vcc-sd {
|
||||
compatible = "regulator-gpio";
|
||||
enable-active-low;
|
||||
enable-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc_sd_h>;
|
||||
regulator-name = "vcc_sd";
|
||||
states = <3300000 0x0
|
||||
3300000 0x1>;
|
||||
};
|
||||
|
||||
vcc_sys: vcc-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3800000>;
|
||||
regulator-max-microvolt = <3800000>;
|
||||
};
|
||||
|
||||
vdd_gpu: vdd-gpu {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm7 0 5000 1>;
|
||||
regulator-name = "vdd_gpu";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-settling-time-up-us = <250>;
|
||||
pwm-supply = <&vcc_sys>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
vdd_npu: vdd-npu {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm6 0 5000 1>;
|
||||
regulator-name = "vdd_npu";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-settling-time-up-us = <250>;
|
||||
pwm-supply = <&vcc_sys>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
rockchip,grf = <&sys_grf>;
|
||||
wifi_chip_type = "ap6275s";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
WIFI,host_wake_irq = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
WIFI,poweren_gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
clocks = <&rk817 1>;
|
||||
clock-names = "ext_clock";
|
||||
//wifi-bt-power-toggle;
|
||||
uart_rts_gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,reset_gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
||||
phy-mode = "rgmii-rxid";
|
||||
clock_in_out = "output";
|
||||
|
||||
snps,reset-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
tx_delay = <0x42>;
|
||||
/* rx_delay = <0x3f>; */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmiim0_miim
|
||||
&rgmiim0_tx_bus2
|
||||
&rgmiim0_rx_bus2
|
||||
&rgmiim0_rgmii_clk
|
||||
&rgmiim0_rgmii_bus
|
||||
ðm0_pins>;
|
||||
|
||||
phy-handle = <&rgmii_phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
usbc0: fusb302@22 {
|
||||
compatible = "fcs,fusb302";
|
||||
reg = <0x22>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <RK_PC7 IRQ_TYPE_LEVEL_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usbc0_int>;
|
||||
vbus-supply = <&otg_switch>;
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
usbc0_role_sw: endpoint@0 {
|
||||
remote-endpoint = <&dwc3_role_switch>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb_con: connector {
|
||||
compatible = "usb-c-connector";
|
||||
label = "USB-C";
|
||||
data-role = "dual";
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
op-sink-microwatt = <1000000>;
|
||||
sink-pdos =
|
||||
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
|
||||
source-pdos =
|
||||
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
|
||||
mpu6500_acc: mpu_acc@68 {
|
||||
compatible = "mpu6500_acc";
|
||||
reg = <0x68>;
|
||||
irq-gpio = <&gpio0 RK_PA7 IRQ_TYPE_EDGE_RISING>;
|
||||
irq_enable = <0>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_ACCEL>;
|
||||
layout = <3>;
|
||||
};
|
||||
|
||||
mpu6500_gyro: mpu_gyro@68 {
|
||||
compatible = "mpu6500_gyro";
|
||||
reg = <0x68>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_GYROSCOPE>;
|
||||
layout = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
&combphy_pu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_in_vp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_in_vp1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&dsi_panel {
|
||||
power-supply = <&vcc3v3_lcd_n>;
|
||||
reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_rst_gpio>;
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
rgmii_phy: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
clocks = <&cru CLK_GMAC_ETH_OUT2IO>;
|
||||
assigned-clocks = <&cru CLK_GMAC_ETH_OUT2IO>;
|
||||
assigned-clock-rates = <25000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pwm6 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm7 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vcc3v3_lcd_n {
|
||||
gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
&video_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie20>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
headphone {
|
||||
hp_det: hp-det {
|
||||
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd {
|
||||
lcd_rst_gpio: lcd-rst-gpio {
|
||||
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_sd {
|
||||
vcc_sd_h: vcc-sd-h {
|
||||
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
usb_host_pwren: usb-host-pwren {
|
||||
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
usbc0_int: usbc0-int {
|
||||
rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sai0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0m0_lrck
|
||||
&i2s0m0_sclk
|
||||
&i2s0m0_sdi0
|
||||
&i2s0m0_sdo0>;
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
no-sd;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_host {
|
||||
status = "okay";
|
||||
phy-supply = <&vcc5v0_usb_host>;
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd30 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
|
||||
dr_mode = "otg";
|
||||
maximum-speed = "high-speed";
|
||||
phys = <&u2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,usb2-lpm-disable;
|
||||
usb-role-switch;
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dwc3_role_switch: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&usbc0_role_sw>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3562-evb2-ddr4-v10.dtsi"
|
||||
#include "rk3562-linux.dtsi"
|
||||
#include "rk3562-rk809.dtsi"
|
||||
9
arch/arm64/boot/dts/rockchip/rk3562-evb2-ddr4-v10.dts
Normal file
9
arch/arm64/boot/dts/rockchip/rk3562-evb2-ddr4-v10.dts
Normal file
@@ -0,0 +1,9 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "rk3562-evb2-ddr4-v10.dtsi"
|
||||
#include "rk3562-android.dtsi"
|
||||
#include "rk3562-rk809.dtsi"
|
||||
411
arch/arm64/boot/dts/rockchip/rk3562-evb2-ddr4-v10.dtsi
Normal file
411
arch/arm64/boot/dts/rockchip/rk3562-evb2-ddr4-v10.dtsi
Normal file
@@ -0,0 +1,411 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3562.dtsi"
|
||||
#include "rk3562-evb.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
#include <dt-bindings/sensor-dev.h>
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3562 EVB2 DDR4 V10 Board";
|
||||
compatible = "rockchip,rk3562-evb2-ddr4-v10", "rockchip,rk3562";
|
||||
|
||||
dc_12v: dc-12v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "dc_12v";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
};
|
||||
|
||||
rk809_sound: rk809-sound {
|
||||
status = "okay";
|
||||
compatible = "rockchip,multicodecs-card";
|
||||
rockchip,card-name = "rockchip-rk809";
|
||||
hp-det-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
|
||||
rockchip,format = "i2s";
|
||||
rockchip,mclk-fs = <256>;
|
||||
rockchip,cpu = <&sai0>;
|
||||
rockchip,codec = <&rk809_codec>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hp_det>;
|
||||
};
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
clocks = <&rk809 1>;
|
||||
clock-names = "ext_clock";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h>;
|
||||
|
||||
/*
|
||||
* On the module itself this is one of these (depending
|
||||
* on the actual card populated):
|
||||
* - SDIO_RESET_L_WL_REG_ON
|
||||
* - PDN (power down when low)
|
||||
*/
|
||||
post-power-on-delay-ms = <200>;
|
||||
reset-gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vcc3v3_pcie20: vcc3v3-pcie20 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie20";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <5000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
vcc5v0_sys: vcc5v0-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
vcc5v0_usb: vcc5v0-usb {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usb";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
vcc5v0_usb_host: vcc5v0-usb-host {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usb_host";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&vcc5v0_usb>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb_host_pwren>;
|
||||
};
|
||||
|
||||
vcc5v0_usb_otg: vcc5v0-usb-otg {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_usb_otg";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&vcc5v0_usb>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb_otg_pwren>;
|
||||
};
|
||||
|
||||
vcc3v3_clk: vcc3v3-clk {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_clk";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
vcc3v3_sys: vcc-sys {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_sys";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
vcc25_ddr: vcc25-ddr {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc25_ddr";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2500000>;
|
||||
regulator-max-microvolt = <2500000>;
|
||||
vin-supply = <&vcc3v3_sys>;
|
||||
};
|
||||
|
||||
vdd_npu: vdd-npu {
|
||||
compatible = "pwm-regulator";
|
||||
pwms = <&pwm6 0 5000 1>;
|
||||
regulator-name = "vdd_npu";
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-settling-time-up-us = <250>;
|
||||
pwm-supply = <&vcc5v0_sys>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
rockchip,grf = <&sys_grf>;
|
||||
wifi_chip_type = "ap6275s";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
WIFI,host_wake_irq = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
WIFI,poweren_gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
clocks = <&rk809 1>;
|
||||
clock-names = "ext_clock";
|
||||
//wifi-bt-power-toggle;
|
||||
uart_rts_gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,reset_gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&combphy_pu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_in_vp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&dsi_in_vp1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&dsi_panel {
|
||||
power-supply = <&vcc3v3_lcd_n>;
|
||||
reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_rst_gpio>;
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
||||
phy-mode = "rgmii-rxid";
|
||||
clock_in_out = "output";
|
||||
|
||||
snps,reset-gpio = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
tx_delay = <0x42>;
|
||||
/* rx_delay = <0x3f>; */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&rgmiim0_miim
|
||||
&rgmiim0_tx_bus2
|
||||
&rgmiim0_rx_bus2
|
||||
&rgmiim0_rgmii_clk
|
||||
&rgmiim0_rgmii_bus
|
||||
ðm0_pins>;
|
||||
|
||||
phy-handle = <&rgmii_phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
|
||||
mpu6500_acc: mpu_acc@68 {
|
||||
compatible = "mpu6500_acc";
|
||||
reg = <0x68>;
|
||||
irq-gpio = <&gpio1 RK_PC7 IRQ_TYPE_EDGE_RISING>;
|
||||
irq_enable = <0>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_ACCEL>;
|
||||
layout = <3>;
|
||||
};
|
||||
|
||||
mpu6500_gyro: mpu_gyro@68 {
|
||||
compatible = "mpu6500_gyro";
|
||||
reg = <0x68>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_GYROSCOPE>;
|
||||
layout = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
rgmii_phy: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
clocks = <&cru CLK_GMAC_ETH_OUT2IO>;
|
||||
assigned-clocks = <&cru CLK_GMAC_ETH_OUT2IO>;
|
||||
assigned-clock-rates = <25000000>;
|
||||
};
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie20>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
headphone {
|
||||
hp_det: hp-det {
|
||||
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd {
|
||||
lcd_rst_gpio: lcd-rst-gpio {
|
||||
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
usb_host_pwren: usb-host-pwren {
|
||||
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
usb_otg_pwren: usb-otg-pwren {
|
||||
rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm6 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sai0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0m0_lrck
|
||||
&i2s0m0_sclk
|
||||
&i2s0m0_sdi0
|
||||
&i2s0m0_sdo0>;
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
no-sd;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spdif_8ch {
|
||||
pinctrl-0 = <&spdifm0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy_host {
|
||||
status = "okay";
|
||||
phy-supply = <&vcc5v0_usb_host>;
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
status = "okay";
|
||||
vbus-supply = <&vcc5v0_usb_otg>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd30 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
status = "okay";
|
||||
dr_mode = "otg";
|
||||
extcon = <&u2phy>;
|
||||
maximum-speed = "high-speed";
|
||||
phys = <&u2phy_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,usb2-lpm-disable;
|
||||
};
|
||||
|
||||
&vcc3v3_lcd_n {
|
||||
gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
&video_phy {
|
||||
status = "okay";
|
||||
};
|
||||
89
arch/arm64/boot/dts/rockchip/rk3562-linux.dtsi
Normal file
89
arch/arm64/boot/dts/rockchip/rk3562-linux.dtsi
Normal file
@@ -0,0 +1,89 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
chosen: chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xff210000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait";
|
||||
};
|
||||
|
||||
fiq-debugger {
|
||||
compatible = "rockchip,fiq-debugger";
|
||||
rockchip,serial-id = <0>;
|
||||
rockchip,wake-irq = <0>;
|
||||
/* If enable uart uses irq instead of fiq */
|
||||
rockchip,irq-mode-enable = <1>;
|
||||
rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
|
||||
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0m0_xfer>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
reserved_memory: reserved-memory {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
drm_logo: drm-logo@00000000 {
|
||||
compatible = "rockchip,drm-logo";
|
||||
reg = <0x0 0x0 0x0 0x0>;
|
||||
};
|
||||
|
||||
drm_cubic_lut: drm-cubic-lut@00000000 {
|
||||
compatible = "rockchip,drm-cubic-lut";
|
||||
reg = <0x0 0x0 0x0 0x0>;
|
||||
};
|
||||
|
||||
ramoops: ramoops@110000 {
|
||||
compatible = "ramoops";
|
||||
/* 0x110000 to 0x1f0000 is for ramoops */
|
||||
reg = <0x0 0x110000 0x0 0xe0000>;
|
||||
boot-log-size = <0x8000>; /* do not change */
|
||||
boot-log-count = <0x1>; /* do not change */
|
||||
console-size = <0x80000>;
|
||||
pmsg-size = <0x30000>;
|
||||
ftrace-size = <0x00000>;
|
||||
record-size = <0x14000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
memory-region = <&drm_logo>, <&drm_cubic_lut>;
|
||||
memory-region-names = "drm-logo", "drm-cubic-lut";
|
||||
/* devfreq = <&dmc>; */
|
||||
|
||||
route {
|
||||
route_dsi: route-dsi {
|
||||
status = "disabled";
|
||||
logo,uboot = "logo.bmp";
|
||||
logo,kernel = "logo_kernel.bmp";
|
||||
logo,mode = "center";
|
||||
charge_logo,mode = "center";
|
||||
connect = <&vp0_out_dsi>;
|
||||
};
|
||||
route_lvds: route-lvds {
|
||||
status = "disabled";
|
||||
logo,uboot = "logo.bmp";
|
||||
logo,kernel = "logo_kernel.bmp";
|
||||
logo,mode = "center";
|
||||
charge_logo,mode = "center";
|
||||
connect = <&vp0_out_lvds>;
|
||||
};
|
||||
route_rgb: route-rgb {
|
||||
status = "disabled";
|
||||
logo,uboot = "logo.bmp";
|
||||
logo,kernel = "logo_kernel.bmp";
|
||||
logo,mode = "center";
|
||||
charge_logo,mode = "center";
|
||||
connect = <&vp1_out_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rng {
|
||||
status = "okay";
|
||||
};
|
||||
269
arch/arm64/boot/dts/rockchip/rk3562-rk809.dtsi
Normal file
269
arch/arm64/boot/dts/rockchip/rk3562-rk809.dtsi
Normal file
@@ -0,0 +1,269 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
rk809: pmic@20 {
|
||||
compatible = "rockchip,rk809";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "default", "pmic-sleep",
|
||||
"pmic-power-off", "pmic-reset";
|
||||
pinctrl-0 = <&pmic_int>;
|
||||
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
|
||||
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
||||
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
|
||||
rockchip,system-power-controller;
|
||||
wakeup-source;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
/* 1: rst regs (default in codes), 0: rst the pmic */
|
||||
pmic-reset-func = <0>;
|
||||
/* not save the PMIC_POWER_EN register in uboot */
|
||||
not-save-power-en = <1>;
|
||||
|
||||
vcc1-supply = <&vcc3v3_sys>;
|
||||
vcc2-supply = <&vcc3v3_sys>;
|
||||
vcc3-supply = <&vcc3v3_sys>;
|
||||
vcc4-supply = <&vcc3v3_sys>;
|
||||
vcc5-supply = <&vcc3v3_sys>;
|
||||
vcc6-supply = <&vcc3v3_sys>;
|
||||
vcc7-supply = <&vcc3v3_sys>;
|
||||
vcc8-supply = <&vcc3v3_sys>;
|
||||
vcc9-supply = <&vcc3v3_sys>;
|
||||
|
||||
pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl_rk8xx: pinctrl_rk8xx {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
rk817_slppin_null: rk817_slppin_null {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk817_slppin_slp: rk817_slppin_slp {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun1";
|
||||
};
|
||||
|
||||
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun2";
|
||||
};
|
||||
|
||||
rk817_slppin_rst: rk817_slppin_rst {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun3";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
vdd_logic: DCDC_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_logic";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu: DCDC_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_cpu";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: DCDC_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_gpu: DCDC_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_gpu";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc2v8_dvp: LDO_REG1 {
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-name = "vcc2v8_dvp";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_0v9: LDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda_0v9";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_pmu: LDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda0v9_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_acodec: LDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-name = "vccio_acodec";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3300000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcca_1v8: LDO_REG7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca_1v8";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_dvp: LDO_REG9 {
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc1v8_dvp";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: DCDC_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: SWITCH_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_sd: SWITCH_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rk809_codec: codec {
|
||||
#sound-dai-cells = <1>;
|
||||
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
|
||||
clocks = <&cru MCLK_SAI0_OUT2IO>;
|
||||
clock-names = "mclk";
|
||||
assigned-clocks = <&cru MCLK_SAI0_OUT2IO>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0m0_mclk>;
|
||||
hp-volume = <20>;
|
||||
spk-volume = <3>;
|
||||
mic-in-differential;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
257
arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi
Normal file
257
arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi
Normal file
@@ -0,0 +1,257 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
rk817: pmic@20 {
|
||||
compatible = "rockchip,rk817";
|
||||
reg = <0x20>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
pinctrl-names = "default", "pmic-sleep",
|
||||
"pmic-power-off", "pmic-reset";
|
||||
pinctrl-0 = <&pmic_int>;
|
||||
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
|
||||
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
|
||||
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
|
||||
rockchip,system-power-controller;
|
||||
wakeup-source;
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "rk808-clkout1", "rk808-clkout2";
|
||||
/* 1: rst regs (default in codes), 0: rst the pmic */
|
||||
pmic-reset-func = <0>;
|
||||
vcc1-supply = <&vcc_sys>;
|
||||
vcc2-supply = <&vcc_sys>;
|
||||
vcc3-supply = <&vcc_sys>;
|
||||
vcc4-supply = <&vcc_sys>;
|
||||
vcc5-supply = <&vcc_sys>;
|
||||
vcc6-supply = <&vcc_sys>;
|
||||
vcc7-supply = <&vcc_sys>;
|
||||
vcc8-supply = <&vcc_sys>;
|
||||
vcc9-supply = <&dcdc_boost>;
|
||||
pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pinctrl_rk8xx: pinctrl_rk8xx {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
rk817_slppin_null: rk817_slppin_null {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun0";
|
||||
};
|
||||
|
||||
rk817_slppin_slp: rk817_slppin_slp {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun1";
|
||||
};
|
||||
|
||||
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun2";
|
||||
};
|
||||
|
||||
rk817_slppin_rst: rk817_slppin_rst {
|
||||
pins = "gpio_slp";
|
||||
function = "pin_fun3";
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
vdd_logic: DCDC_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_logic";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu: DCDC_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <500000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-init-microvolt = <900000>;
|
||||
regulator-ramp-delay = <6001>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vdd_cpu";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_ddr: DCDC_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vcc_ddr";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_3v3: DCDC_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-initial-mode = <0x2>;
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcca1v8_pmu: LDO_REG1 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcca1v8_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <1800000>;
|
||||
};
|
||||
};
|
||||
|
||||
vdda_0v9: LDO_REG2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda_0v9";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdda0v9_pmu: LDO_REG3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-name = "vdda0v9_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <900000>;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_acodec: LDO_REG4 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_acodec";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vccio_sd: LDO_REG5 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc3v3_pmu: LDO_REG6 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-name = "vcc3v3_pmu";
|
||||
regulator-state-mem {
|
||||
regulator-on-in-suspend;
|
||||
regulator-suspend-microvolt = <3000000>;
|
||||
};
|
||||
};
|
||||
|
||||
vcc_1v8: LDO_REG7 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc1v8_dvp: LDO_REG8 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-name = "vcc1v8_dvp";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vcc2v8_dvp: LDO_REG9 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-name = "vcc2v8_dvp";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
dcdc_boost: BOOST {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <4700000>;
|
||||
regulator-max-microvolt = <5400000>;
|
||||
regulator-name = "boost";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
otg_switch: OTG_SWITCH {
|
||||
regulator-name = "otg_switch";
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rk817_codec: codec {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "rockchip,rk817-codec";
|
||||
clocks = <&cru MCLK_SAI0_OUT2IO>;
|
||||
clock-names = "mclk";
|
||||
assigned-clocks = <&cru MCLK_SAI0_OUT2IO>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0m0_mclk>;
|
||||
hp-volume = <20>;
|
||||
spk-volume = <3>;
|
||||
mic-in-differential;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user