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lcd_hdmi_xxx.c:fix compile err

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This commit is contained in:
yxj
2013-02-28 17:10:44 +08:00
parent 61acb3872d
commit 2e1f89a9d3
3 changed files with 296 additions and 263 deletions
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14
drivers/video/display/screen/lcd_hdmi_1024x768.c
View File

@@ -275,4 +275,16 @@ void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
#ifdef CONFIG_RK610_LVDS
screen->sscreen_set = rk610_lcd_scaler_set_param;
#endif
}
}
size_t get_fb_size(void)
{
size_t size = 0;
#if defined(CONFIG_THREE_FB_BUFFER)
size = ((H_VD)*(V_VD)<<2)* 3; //three buffer
#else
size = ((H_VD)*(V_VD)<<2)<<1; //two buffer
#endif
return ALIGN(size,SZ_1M);
}

10
drivers/video/display/screen/lcd_hdmi_1280x800.c
View File

@@ -280,4 +280,14 @@ void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
}
size_t get_fb_size(void)
{
size_t size = 0;
#if defined(CONFIG_THREE_FB_BUFFER)
size = ((H_VD)*(V_VD)<<2)* 3; //three buffer
#else
size = ((H_VD)*(V_VD)<<2)<<1; //two buffer
#endif
return ALIGN(size,SZ_1M);
}

535
drivers/video/display/screen/lcd_hdmi_800x480.c
View File

@@ -1,20 +1,20 @@
#include <linux/fb.h>
#include <linux/delay.h>
#include <mach/gpio.h>
#include <mach/iomux.h>
#include <mach/board.h>
#include "screen.h"
#include <linux/hdmi.h>
#include "../../rk29_fb.h"
#include "../transmitter/rk610_lcd.h"
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
#define OUT_CLK 33000000
#define LCDC_ACLK 150000000//312000000 //29 lcdc axi DMA Ƶ<><C6B5>
#include <linux/fb.h>
#include <linux/delay.h>
#include <mach/gpio.h>
#include <mach/iomux.h>
#include <mach/board.h>
#include "screen.h"
#include <linux/hdmi.h>
#include "../../rk29_fb.h"
#include "../transmitter/rk610_lcd.h"
/* Base */
#define OUT_TYPE SCREEN_RGB
#define OUT_FACE OUT_P888
#define OUT_CLK 33000000
#define LCDC_ACLK 150000000//312000000 //29 lcdc axi DMA Ƶ<><C6B5>
/* Timing */
#define H_PW 1
#define H_BP 88
@@ -24,253 +24,264 @@
#define V_PW 3
#define V_BP 29
#define V_VD 480
#define V_FP 13
#define LCD_WIDTH 154
#define LCD_HEIGHT 85
/* scaler Timing */
//1920*1080*60
#define S_OUT_CLK SCALE_RATE(148500000,33000000)
#define S_H_PW 1
#define S_H_BP 88
#define S_H_VD 800
#define S_H_FP 211
#define S_V_PW 3
#define S_V_BP 10
#define S_V_VD 480
#define S_V_FP 7
#define S_H_ST 244
#define S_V_ST 11
//1920*1080*50
#define S1_OUT_CLK SCALE_RATE(148500000,30375000)
#define S1_H_PW 1
#define S1_H_BP 88
#define S1_H_VD 800
#define S1_H_FP 326
#define V_FP 13
#define S1_V_PW 3
#define S1_V_BP 9
#define S1_V_VD 480
#define S1_V_FP 8
#define S1_H_ST 270
#define S1_V_ST 13
//1280*720*60
#define S2_OUT_CLK SCALE_RATE(74250000,33000000)
#define S2_H_PW 1
#define S2_H_BP 88
#define S2_H_VD 800
#define S2_H_FP 211
#define LCD_WIDTH 154
#define LCD_HEIGHT 85
#define S2_V_PW 3
#define S2_V_BP 9
#define S2_V_VD 480
#define S2_V_FP 8
#define S2_H_ST 0
#define S2_V_ST 8
//1280*720*50
#define S3_OUT_CLK SCALE_RATE(74250000,30375000)
#define S3_H_PW 1
#define S3_H_BP 88
#define S3_H_VD 800
#define S3_H_FP 326
/* scaler Timing */
//1920*1080*60
#define S3_V_PW 3
#define S3_V_BP 9
#define S3_V_VD 480
#define S3_V_FP 8
#define S3_H_ST 0
#define S3_V_ST 8
//720*576*50
#define S4_OUT_CLK SCALE_RATE(27000000,30000000)
#define S4_H_PW 1
#define S4_H_BP 88
#define S4_H_VD 800
#define S4_H_FP 263
#define S_OUT_CLK SCALE_RATE(148500000,33000000)
#define S_H_PW 1
#define S_H_BP 88
#define S_H_VD 800
#define S_H_FP 211
#define S4_V_PW 3
#define S4_V_BP 9
#define S4_V_VD 480
#define S4_V_FP 28
#define S4_H_ST 0
#define S4_V_ST 33
//720*480*60
#define S5_OUT_CLK SCALE_RATE(27000000,31500000)
#define S5_H_PW 1
#define S5_H_BP 88
#define S5_H_VD 800
#define S5_H_FP 112
#define S_V_PW 3
#define S_V_BP 10
#define S_V_VD 480
#define S_V_FP 7
#define S_H_ST 244
#define S_V_ST 11
//1920*1080*50
#define S1_OUT_CLK SCALE_RATE(148500000,30375000)
#define S1_H_PW 1
#define S1_H_BP 88
#define S1_H_VD 800
#define S1_H_FP 326
#define S1_V_PW 3
#define S1_V_BP 9
#define S1_V_VD 480
#define S1_V_FP 8
#define S1_H_ST 270
#define S1_V_ST 13
//1280*720*60
#define S2_OUT_CLK SCALE_RATE(74250000,33000000)
#define S2_H_PW 1
#define S2_H_BP 88
#define S2_H_VD 800
#define S2_H_FP 211
#define S2_V_PW 3
#define S2_V_BP 9
#define S2_V_VD 480
#define S2_V_FP 8
#define S2_H_ST 0
#define S2_V_ST 8
//1280*720*50
#define S3_OUT_CLK SCALE_RATE(74250000,30375000)
#define S3_H_PW 1
#define S3_H_BP 88
#define S3_H_VD 800
#define S3_H_FP 326
#define S3_V_PW 3
#define S3_V_BP 9
#define S3_V_VD 480
#define S3_V_FP 8
#define S3_H_ST 0
#define S3_V_ST 8
//720*576*50
#define S4_OUT_CLK SCALE_RATE(27000000,30000000)
#define S4_H_PW 1
#define S4_H_BP 88
#define S4_H_VD 800
#define S4_H_FP 263
#define S4_V_PW 3
#define S4_V_BP 9
#define S4_V_VD 480
#define S4_V_FP 28
#define S4_H_ST 0
#define S4_V_ST 33
//720*480*60
#define S5_OUT_CLK SCALE_RATE(27000000,31500000)
#define S5_H_PW 1
#define S5_H_BP 88
#define S5_H_VD 800
#define S5_H_FP 112
#define S5_V_PW 3
#define S5_V_BP 9
#define S5_V_VD 480
#define S5_V_FP 28
#define S5_H_ST 0
#define S5_V_ST 29
#define S_DCLK_POL 0
/* Other */
#define DCLK_POL 0
#define SWAP_RB 0
#ifdef CONFIG_HDMI_DUAL_DISP
static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)
{
screen->s_clk_inv = S_DCLK_POL;
screen->s_den_inv = 0;
screen->s_hv_sync_inv = 0;
switch(hdmi_resolution){
case HDMI_1920x1080p_60Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S_OUT_CLK;
screen->s_hsync_len = S_H_PW;
screen->s_left_margin = S_H_BP;
screen->s_right_margin = S_H_FP;
screen->s_hsync_len = S_H_PW;
screen->s_upper_margin = S_V_BP;
screen->s_lower_margin = S_V_FP;
screen->s_vsync_len = S_V_PW;
screen->s_hsync_st = S_H_ST;
screen->s_vsync_st = S_V_ST;
break;
case HDMI_1920x1080p_50Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S1_OUT_CLK;
screen->s_hsync_len = S1_H_PW;
screen->s_left_margin = S1_H_BP;
screen->s_right_margin = S1_H_FP;
screen->s_hsync_len = S1_H_PW;
screen->s_upper_margin = S1_V_BP;
screen->s_lower_margin = S1_V_FP;
screen->s_vsync_len = S1_V_PW;
screen->s_hsync_st = S1_H_ST;
screen->s_vsync_st = S1_V_ST;
break;
case HDMI_1280x720p_60Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S2_OUT_CLK;
screen->s_hsync_len = S2_H_PW;
screen->s_left_margin = S2_H_BP;
screen->s_right_margin = S2_H_FP;
screen->s_hsync_len = S2_H_PW;
screen->s_upper_margin = S2_V_BP;
screen->s_lower_margin = S2_V_FP;
screen->s_vsync_len = S2_V_PW;
screen->s_hsync_st = S2_H_ST;
screen->s_vsync_st = S2_V_ST;
break;
case HDMI_1280x720p_50Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S3_OUT_CLK;
screen->s_hsync_len = S3_H_PW;
screen->s_left_margin = S3_H_BP;
screen->s_right_margin = S3_H_FP;
screen->s_hsync_len = S3_H_PW;
screen->s_upper_margin = S3_V_BP;
screen->s_lower_margin = S3_V_FP;
screen->s_vsync_len = S3_V_PW;
screen->s_hsync_st = S3_H_ST;
screen->s_vsync_st = S3_V_ST;
break;
case HDMI_720x576p_50Hz_4x3:
case HDMI_720x576p_50Hz_16x9:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S4_OUT_CLK;
screen->s_hsync_len = S4_H_PW;
screen->s_left_margin = S4_H_BP;
screen->s_right_margin = S4_H_FP;
screen->s_hsync_len = S4_H_PW;
screen->s_upper_margin = S4_V_BP;
screen->s_lower_margin = S4_V_FP;
screen->s_vsync_len = S4_V_PW;
screen->s_hsync_st = S4_H_ST;
screen->s_vsync_st = S4_V_ST;
break;
case HDMI_720x480p_60Hz_16x9:
case HDMI_720x480p_60Hz_4x3:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S5_OUT_CLK;
screen->s_hsync_len = S5_H_PW;
screen->s_left_margin = S5_H_BP;
screen->s_right_margin = S5_H_FP;
screen->s_hsync_len = S5_H_PW;
screen->s_upper_margin = S5_V_BP;
screen->s_lower_margin = S5_V_FP;
screen->s_vsync_len = S5_V_PW;
screen->s_hsync_st = S5_H_ST;
screen->s_vsync_st = S5_V_ST;
break;
default :
printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
return -1;
break;
}
return 0;
}
#else
static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}
#endif
void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
{
/* screen type & face */
screen->type = OUT_TYPE;
screen->face = OUT_FACE;
/* Screen size */
screen->x_res = H_VD;
screen->y_res = V_VD;
screen->width = LCD_WIDTH;
screen->height = LCD_HEIGHT;
/* Timing */
screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
screen->hsync_len = H_PW;
screen->upper_margin = V_BP;
screen->lower_margin = V_FP;
screen->vsync_len = V_PW;
/* Pin polarity */
screen->pin_hsync = 0;
screen->pin_vsync = 0;
screen->pin_den = 0;
screen->pin_dclk = DCLK_POL;
/* Swap rule */
screen->swap_rb = SWAP_RB;
screen->swap_rg = 0;
screen->swap_gb = 0;
screen->swap_delta = 0;
screen->swap_dumy = 0;
/* Operation function*/
screen->init = NULL;
screen->standby = NULL;
screen->sscreen_get = set_scaler_info;
#ifdef CONFIG_RK610_LVDS
screen->sscreen_set = rk610_lcd_scaler_set_param;
#endif
}
size_t get_fb_size(void)
{
size_t size = 0;
#if defined(CONFIG_THREE_FB_BUFFER)
size = ((H_VD)*(V_VD)<<2)* 3; //three buffer
#else
size = ((H_VD)*(V_VD)<<2)<<1; //two buffer
#endif
return ALIGN(size,SZ_1M);
}
#define S5_V_PW 3
#define S5_V_BP 9
#define S5_V_VD 480
#define S5_V_FP 28
#define S5_H_ST 0
#define S5_V_ST 29
#define S_DCLK_POL 0
/* Other */
#define DCLK_POL 0
#define SWAP_RB 0
#ifdef CONFIG_HDMI_DUAL_DISP
static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)
{
screen->s_clk_inv = S_DCLK_POL;
screen->s_den_inv = 0;
screen->s_hv_sync_inv = 0;
switch(hdmi_resolution){
case HDMI_1920x1080p_60Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S_OUT_CLK;
screen->s_hsync_len = S_H_PW;
screen->s_left_margin = S_H_BP;
screen->s_right_margin = S_H_FP;
screen->s_hsync_len = S_H_PW;
screen->s_upper_margin = S_V_BP;
screen->s_lower_margin = S_V_FP;
screen->s_vsync_len = S_V_PW;
screen->s_hsync_st = S_H_ST;
screen->s_vsync_st = S_V_ST;
break;
case HDMI_1920x1080p_50Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S1_OUT_CLK;
screen->s_hsync_len = S1_H_PW;
screen->s_left_margin = S1_H_BP;
screen->s_right_margin = S1_H_FP;
screen->s_hsync_len = S1_H_PW;
screen->s_upper_margin = S1_V_BP;
screen->s_lower_margin = S1_V_FP;
screen->s_vsync_len = S1_V_PW;
screen->s_hsync_st = S1_H_ST;
screen->s_vsync_st = S1_V_ST;
break;
case HDMI_1280x720p_60Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S2_OUT_CLK;
screen->s_hsync_len = S2_H_PW;
screen->s_left_margin = S2_H_BP;
screen->s_right_margin = S2_H_FP;
screen->s_hsync_len = S2_H_PW;
screen->s_upper_margin = S2_V_BP;
screen->s_lower_margin = S2_V_FP;
screen->s_vsync_len = S2_V_PW;
screen->s_hsync_st = S2_H_ST;
screen->s_vsync_st = S2_V_ST;
break;
case HDMI_1280x720p_50Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S3_OUT_CLK;
screen->s_hsync_len = S3_H_PW;
screen->s_left_margin = S3_H_BP;
screen->s_right_margin = S3_H_FP;
screen->s_hsync_len = S3_H_PW;
screen->s_upper_margin = S3_V_BP;
screen->s_lower_margin = S3_V_FP;
screen->s_vsync_len = S3_V_PW;
screen->s_hsync_st = S3_H_ST;
screen->s_vsync_st = S3_V_ST;
break;
case HDMI_720x576p_50Hz_4x3:
case HDMI_720x576p_50Hz_16x9:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S4_OUT_CLK;
screen->s_hsync_len = S4_H_PW;
screen->s_left_margin = S4_H_BP;
screen->s_right_margin = S4_H_FP;
screen->s_hsync_len = S4_H_PW;
screen->s_upper_margin = S4_V_BP;
screen->s_lower_margin = S4_V_FP;
screen->s_vsync_len = S4_V_PW;
screen->s_hsync_st = S4_H_ST;
screen->s_vsync_st = S4_V_ST;
break;
case HDMI_720x480p_60Hz_16x9:
case HDMI_720x480p_60Hz_4x3:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S5_OUT_CLK;
screen->s_hsync_len = S5_H_PW;
screen->s_left_margin = S5_H_BP;
screen->s_right_margin = S5_H_FP;
screen->s_hsync_len = S5_H_PW;
screen->s_upper_margin = S5_V_BP;
screen->s_lower_margin = S5_V_FP;
screen->s_vsync_len = S5_V_PW;
screen->s_hsync_st = S5_H_ST;
screen->s_vsync_st = S5_V_ST;
break;
default :
printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
return -1;
break;
}
return 0;
}
#else
static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution){}
#endif
void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info )
{
/* screen type & face */
screen->type = OUT_TYPE;
screen->face = OUT_FACE;
/* Screen size */
screen->x_res = H_VD;
screen->y_res = V_VD;
screen->width = LCD_WIDTH;
screen->height = LCD_HEIGHT;
/* Timing */
screen->lcdc_aclk = LCDC_ACLK;
screen->pixclock = OUT_CLK;
screen->left_margin = H_BP;
screen->right_margin = H_FP;
screen->hsync_len = H_PW;
screen->upper_margin = V_BP;
screen->lower_margin = V_FP;
screen->vsync_len = V_PW;
/* Pin polarity */
screen->pin_hsync = 0;
screen->pin_vsync = 0;
screen->pin_den = 0;
screen->pin_dclk = DCLK_POL;
/* Swap rule */
screen->swap_rb = SWAP_RB;
screen->swap_rg = 0;
screen->swap_gb = 0;
screen->swap_delta = 0;
screen->swap_dumy = 0;
/* Operation function*/
screen->init = NULL;
screen->standby = NULL;
screen->sscreen_get = set_scaler_info;
#ifdef CONFIG_RK610_LVDS
screen->sscreen_set = rk610_lcd_scaler_set_param;
#endif
}