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dt-bindings: phy: phy-rockchip-inno-mipi-dphy: Remove support for rk3368

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Change-Id: I72b4017625c41b15b15d34123f2acdd60a1d7650
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
This commit is contained in:
Wyon Bi
2019-01-02 08:35:10 +08:00
committed by Tao Huang
parent f9fcd7f37a
commit 2ece7c824f
1 changed files with 7 additions and 20 deletions
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27
Documentation/devicetree/bindings/phy/phy-rockchip-inno-mipi-dphy.txt
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@@ -5,7 +5,6 @@ Required properties:
"rockchip,rk1808-mipi-dphy";
"rockchip,rk3128-mipi-dphy";
"rockchip,rk3366-mipi-dphy";
"rockchip,rk3368-mipi-dphy";
- reg : the address offset of register for mipi-dphy configuration.
- #phy-cells : must be 0. See ./phy-bindings.txt for details.
- clocks and clock-names:
@@ -24,28 +23,16 @@ Optional properties
- clock-names: should be "h2p".
Example:
For Rockchip RK3368
mipi_dphy: mipi-dphy@ff968000 {
compatible = "rockchip,rk3368-mipi-dphy";
reg = <0x0 0xff968000 0x0 0x4000>;
clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>;
mipi_dphy: mipi-dphy@ff370000 {
compatible = "rockchip,rk1808-mipi-dphy";
reg = <0x0 0xff370000 0x0 0x500>;
clocks = <&cru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>;
clock-names = "ref", "pclk";
clock-output-names = "mipi_dphy_pll";
#clock-cells = <0>;
resets = <&cru SRST_MIPIDPHYTX>;
resets = <&cru SRST_MIPIDSIPHY_P>;
reset-names = "apb";
#phy-cells = <0>;
};
Then the PHY can be used in other nodes such as:
dsi@ff960000 {
...
clocks = <&cru PCLK_MIPI_DSI0>, <&mipi_dphy>;
clock-names = "pclk", "hs_clk";
phys = <&mipi_dphy>;
phy-names = "mipi_dphy";
...
rockchip,grf = <&grf>;
status = "disabled";
};