shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 20:07:46 +09:00
Code Issues Packages Projects Releases Wiki Activity

hdr: add hlg support

Browse Source 
PD#166567: hdr: add hlg support

Change-Id: I00acc352ce534485c8950f979704f96880811faa
Signed-off-by: MingLiang Dong <mingliang.dong@amlogic.com>
This commit is contained in:
MingLiang Dong
2018-05-16 17:24:32 +08:00
committed by Yixun Lan
parent 5d61f94ef4
commit 2ef44c846f
4 changed files with 887 additions and 302 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1158
drivers/amlogic/media/enhancement/amvecm/amcsc.c
View File

File diff suppressed because it is too large Load Diff

8
drivers/amlogic/media/enhancement/amvecm/amcsc.h
View File

@@ -69,6 +69,9 @@ enum vpp_matrix_csc_e {
VPP_MATRIX_YUV709F_RGB = 0x24,
VPP_MATRIX_YUV709F_YUV601 = 0x25,
VPP_MATRIX_YUV709F_YUV709 = 0x26,
VPP_MATRIX_YUV601L_YUV709L = 0x27,
VPP_MATRIX_YUV709L_YUV601L = 0x28,
VPP_MATRIX_YUV709F_YUV601F = 0x29,
VPP_MATRIX_BT2020YUV_BT2020RGB = 0x40,
VPP_MATRIX_BT2020RGB_709RGB,
VPP_MATRIX_BT2020RGB_CUSRGB,
@@ -108,6 +111,9 @@ enum mtx_en_e {
#define XVY_MTX_EN_MASK (1 << XVY_MTX_EN)
#define OSD1_MTX_EN_MASK (1 << OSD1_MTX_EN)
#define HDR_SUPPORT (1 << 2)
#define HLG_SUPPORT (1 << 3)
#define LUT_289_SIZE 289
extern unsigned int lut_289_mapping[LUT_289_SIZE];
extern int dnlp_en;
@@ -136,6 +142,6 @@ extern int VSYNC_WR_MPEG_REG(u32 adr, u32 val);
#endif
extern u32 get_video_enabled(void);
extern void get_hdr_source_type(void);
#endif /* AM_CSC_H */

18
drivers/amlogic/media/enhancement/amvecm/amvecm.c
View File

@@ -150,6 +150,7 @@ module_param(pq_user_latch_flag, uint, 0664);
MODULE_PARM_DESC(pq_user_latch_flag, "\n pq_user_latch_flag\n");
unsigned int pq_user_value;
unsigned int hdr_source_type = 0x1;
static int wb_init_bypass_coef[24] = {
0, 0, 0, /* pre offset */
@@ -929,6 +930,9 @@ int amvecm_on_vs(
result = amvecm_matrix_process(NULL, NULL, flags);
}
if (!is_dolby_vision_on())
get_hdr_source_type();
/* add some flag to trigger */
if (vf) {
/*gxlx sharpness adaptive setting*/
@@ -4194,6 +4198,18 @@ static ssize_t amvecm_reg_store(struct class *cla,
return count;
}
static ssize_t amvecm_get_hdr_type_show(struct class *cla,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%x\n", hdr_source_type);
}
static ssize_t amvecm_get_hdr_type_store(struct class *cls,
struct class_attribute *attr,
const char *buffer, size_t count)
{
return count;
}
/* #if (MESON_CPU_TYPE == MESON_CPU_TYPE_MESONG9TV) */
void init_pq_setting(void)
@@ -4392,6 +4408,8 @@ static struct class_attribute amvecm_class_attrs[] = {
amvecm_pq_user_show, amvecm_pq_user_store),
__ATTR(pq_reg_rw, 0644,
amvecm_write_reg_show, amvecm_write_reg_store),
__ATTR(get_hdr_type, 0644,
amvecm_get_hdr_type_show, amvecm_get_hdr_type_store),
__ATTR_NULL
};

5
include/linux/amlogic/media/amvecm/amvecm.h
View File

@@ -95,6 +95,10 @@
#define MTX_BYPASS_RGB_OGO (1 << 0)
#define MTX_RGB2YUVL_RGB_OGO (1 << 1)
#define SDR_SOURCE (1 << 0)
#define HDR10_SOURCE (1 << 1)
#define HLG_SOURCE (1 << 2)
enum pq_table_name_e {
TABLE_NAME_SHARPNESS0 = 0x1,/*in vpp*/
TABLE_NAME_SHARPNESS1 = 0x2,/*in vpp*/
@@ -292,6 +296,7 @@ static inline uint32_t READ_VPP_REG_BITS(uint32_t reg,
extern signed int vd1_brightness, vd1_contrast;
extern bool gamma_en;
extern unsigned int hdr_source_type;
#define CSC_FLAG_TOGGLE_FRAME 1
#define CSC_FLAG_CHECK_OUTPUT 2