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UPSTREAM: spi: rockchip: read transfer info directly

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Just read transfer info directly from the spi device
and transfer structures rather than storing it in
driver data first.

Change-Id: I919be5488196e6ad5e2fbac211d64c9fb2a38ec7
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit fc1ad8ee33)
This commit is contained in:
Emil Renner Berthing
2018-10-31 11:57:03 +01:00
committed by Tao Huang
parent da6324822d
commit 2f8a03b661
1 changed files with 26 additions and 48 deletions
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74
drivers/spi/spi-rockchip.c
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@@ -185,12 +185,8 @@ struct rockchip_spi {
/* max bus freq supported */
u32 max_freq;
u16 mode;
u8 tmode;
u8 bpw;
u8 n_bytes;
u32 rsd_nsecs;
unsigned len;
u32 speed;
const void *tx;
@@ -201,8 +197,6 @@ struct rockchip_spi {
bool cs_asserted[ROCKCHIP_SPI_MAX_CS_NUM];
bool use_dma;
struct sg_table tx_sg;
struct sg_table rx_sg;
struct rockchip_spi_dma_data dma_rx;
struct rockchip_spi_dma_data dma_tx;
struct pinctrl_state *high_speed_state;
@@ -290,17 +284,6 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
rs->cs_asserted[spi->chip_select] = cs_asserted;
}
static int rockchip_spi_prepare_message(struct spi_master *master,
struct spi_message *msg)
{
struct rockchip_spi *rs = spi_master_get_devdata(master);
struct spi_device *spi = msg->spi;
rs->mode = spi->mode;
return 0;
}
static void rockchip_spi_handle_err(struct spi_master *master,
struct spi_message *msg)
{
@@ -418,19 +401,20 @@ static u32 rockchip_spi_calc_burst_size(u32 data_len)
return i;
}
static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
static int rockchip_spi_prepare_dma(struct rockchip_spi *rs,
struct spi_transfer *xfer)
{
struct dma_async_tx_descriptor *rxdesc, *txdesc;
atomic_set(&rs->state, 0);
rxdesc = NULL;
if (rs->rx) {
if (xfer->rx_buf) {
struct dma_slave_config rxconf = {
.direction = DMA_DEV_TO_MEM,
.src_addr = rs->dma_rx.addr,
.src_addr_width = rs->n_bytes,
.src_maxburst = rockchip_spi_calc_burst_size(rs->len /
.src_maxburst = rockchip_spi_calc_burst_size(xfer->len /
rs->n_bytes),
};
@@ -438,7 +422,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
rxdesc = dmaengine_prep_slave_sg(
rs->dma_rx.ch,
rs->rx_sg.sgl, rs->rx_sg.nents,
xfer->rx_sg.sgl, xfer->rx_sg.nents,
DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT);
if (!rxdesc)
return -EINVAL;
@@ -448,7 +432,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
}
txdesc = NULL;
if (rs->tx) {
if (xfer->tx_buf) {
struct dma_slave_config txconf = {
.direction = DMA_MEM_TO_DEV,
.dst_addr = rs->dma_tx.addr,
@@ -460,7 +444,7 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
txdesc = dmaengine_prep_slave_sg(
rs->dma_tx.ch,
rs->tx_sg.sgl, rs->tx_sg.nents,
xfer->tx_sg.sgl, xfer->tx_sg.nents,
DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
if (!txdesc) {
if (rxdesc)
@@ -491,7 +475,8 @@ static int rockchip_spi_prepare_dma(struct rockchip_spi *rs)
return 1;
}
static void rockchip_spi_config(struct rockchip_spi *rs)
static void rockchip_spi_config(struct rockchip_spi *rs,
struct spi_device *spi, struct spi_transfer *xfer)
{
u32 div = 0;
u32 dmacr = 0;
@@ -503,13 +488,19 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
| CR0_EM_BIG << CR0_EM_OFFSET;
cr0 |= (rs->n_bytes << CR0_DFS_OFFSET);
cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET);
cr0 |= (rs->tmode << CR0_XFM_OFFSET);
cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
if (xfer->rx_buf && xfer->tx_buf)
cr0 |= CR0_XFM_TR << CR0_XFM_OFFSET;
else if (xfer->rx_buf)
cr0 |= CR0_XFM_RO << CR0_XFM_OFFSET;
else
cr0 |= CR0_XFM_TO << CR0_XFM_OFFSET;
if (rs->use_dma) {
if (rs->tx)
if (xfer->tx_buf)
dmacr |= TF_DMA_EN;
if (rs->rx)
if (xfer->rx_buf)
dmacr |= RF_DMA_EN;
}
@@ -556,17 +547,17 @@ static void rockchip_spi_config(struct rockchip_spi *rs)
writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0);
if (rs->n_bytes == 1)
writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
writel_relaxed(xfer->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
else if (rs->n_bytes == 2)
writel_relaxed((rs->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
writel_relaxed((xfer->len / 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
else
writel_relaxed((rs->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
writel_relaxed((xfer->len * 2) - 1, rs->regs + ROCKCHIP_SPI_CTRLR1);
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR);
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR);
writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_DMATDLR);
writel_relaxed(rockchip_spi_calc_burst_size(rs->len / rs->n_bytes) - 1,
writel_relaxed(rockchip_spi_calc_burst_size(xfer->len / rs->n_bytes) - 1,
rs->regs + ROCKCHIP_SPI_DMARDLR);
writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR);
@@ -601,24 +592,12 @@ static int rockchip_spi_transfer_one(
}
rs->speed = xfer->speed_hz;
rs->bpw = xfer->bits_per_word;
rs->n_bytes = rs->bpw >> 3;
rs->n_bytes = xfer->bits_per_word >> 3;
rs->tx = xfer->tx_buf;
rs->tx_end = rs->tx + xfer->len;
rs->rx = xfer->rx_buf;
rs->rx_end = rs->rx + xfer->len;
rs->len = xfer->len;
rs->tx_sg = xfer->tx_sg;
rs->rx_sg = xfer->rx_sg;
if (rs->tx && rs->rx)
rs->tmode = CR0_XFM_TR;
else if (rs->tx)
rs->tmode = CR0_XFM_TO;
else if (rs->rx)
rs->tmode = CR0_XFM_RO;
/* we need prepare dma before spi was enabled */
if (master->can_dma && master->can_dma(master, spi, xfer))
@@ -626,10 +605,10 @@ static int rockchip_spi_transfer_one(
else
rs->use_dma = false;
rockchip_spi_config(rs);
rockchip_spi_config(rs, spi, xfer);
if (rs->use_dma)
return rockchip_spi_prepare_dma(rs);
return rockchip_spi_prepare_dma(rs, xfer);
return rockchip_spi_pio_transfer(rs);
}
@@ -721,7 +700,6 @@ static int rockchip_spi_probe(struct platform_device *pdev)
master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
master->set_cs = rockchip_spi_set_cs;
master->prepare_message = rockchip_spi_prepare_message;
master->transfer_one = rockchip_spi_transfer_one;
master->max_transfer_size = rockchip_spi_max_transfer_size;
master->handle_err = rockchip_spi_handle_err;