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bandwidth: fix wrong bandwidth usage on t950 [1/3]

Browse Source 
PD#TV-470

Problem:
t950 ddr bandwidth usage is error

Solution:
t950/805x ddr is 16bit, correct the param to get right usage

Verify:
t950

Change-Id: Ice876f82e5c33e778b3ac9f593e0c163d57d7f3f
Signed-off-by: wenbiao zhang <wenbiao.zhang@amlogic.com>
This commit is contained in:
wenbiao zhang
2019-01-18 17:03:54 +08:00
committed by Tao Zeng
parent 6348aae233
commit 301972ebb7
3 changed files with 17 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/amlogic/ddr_tool/ddr_bandwidth.c
View File

@@ -74,7 +74,7 @@ static void cal_ddr_usage(struct ddr_bandwidth *db, struct ddr_grant *dg)
freq = db->ops->get_freq(db);
mul = dg->all_grant;
mul *= 10000ULL;
mul /= 16;
do_div(mul, db->bytes_per_cycle);
cnt = db->clock_count;
do_div(mul, cnt);
db->total_usage = mul;
@@ -203,7 +203,8 @@ static ssize_t threshold_show(struct class *cla,
struct class_attribute *attr, char *buf)
{
return sprintf(buf, "%d\n",
aml_db->threshold / 16 / (aml_db->clock_count / 10000));
aml_db->threshold / aml_db->bytes_per_cycle
/ (aml_db->clock_count / 10000));
}
static ssize_t threshold_store(struct class *cla,
@@ -218,7 +219,8 @@ static ssize_t threshold_store(struct class *cla,
if (val > 10000)
val = 10000;
aml_db->threshold = val * 16 * (aml_db->clock_count / 10000);
aml_db->threshold = val * aml_db->bytes_per_cycle
* (aml_db->clock_count / 10000);
return count;
}
@@ -545,6 +547,11 @@ static int __init ddr_bandwidth_probe(struct platform_device *pdev)
goto inval;
}
if (is_meson_txl_package_950() || is_meson_gxl_package_805X())
aml_db->bytes_per_cycle = 8;
else
aml_db->bytes_per_cycle = 16;
/* set channel */
if (aml_db->cpu_type < MESON_CPU_MAJOR_ID_GXTVBB) {
aml_db->channels = 1;
@@ -599,7 +606,7 @@ static int __init ddr_bandwidth_probe(struct platform_device *pdev)
#endif
aml_db->clock_count = DEFAULT_CLK_CNT;
aml_db->mode = MODE_DISABLE;
aml_db->threshold = DEFAULT_THRESHOLD * 16 *
aml_db->threshold = DEFAULT_THRESHOLD * aml_db->bytes_per_cycle *
(aml_db->clock_count / 10000);
if (aml_db->cpu_type <= MESON_CPU_MAJOR_ID_GXTVBB)
aml_db->ops = &gx_ddr_bw_ops;

1
include/linux/amlogic/aml_ddr_bandwidth.h
View File

@@ -134,6 +134,7 @@ struct ddr_bandwidth {
unsigned short real_ports;
char busy;
char mode;
char bytes_per_cycle;
int mali_port[2];
unsigned int threshold;
unsigned int irq_num;

5
include/linux/amlogic/cpu_version.h
View File

@@ -147,6 +147,11 @@ static inline bool is_meson_txl_cpu(void)
return get_cpu_type() == MESON_CPU_MAJOR_ID_TXL;
}
static inline bool is_meson_txl_package_950(void)
{
return is_meson_txl_cpu() && package_id_is(0x20);
}
static inline bool is_meson_txlx_cpu(void)
{
return get_cpu_type() == MESON_CPU_MAJOR_ID_TXLX;