Merge commit '1d795ddee4f73b2739410f99c22280b00f452187'

* commit '1d795ddee4f73b2739410f99c22280b00f452187':
  soc: rockchip: cpuinfo: optimize error log
  rtc: rockchip: fix the rtc suspend crash
  soc: rockchip: fiq debugger: check "target_cpu" before switch cpu
  clk/rockchip/regmap: rate should not be zero
  mmc: dw_mmc: Fix DM 4GB TF card write data errors in RV1106
  arm64: rk3308_linux_defconfig: enable Rockchip RPMsg
  media: i2c: imx577: fix exposure control range according to datasheet
  arm64: configs: rockchip_linux: change RPMSG config to RPMSG_MBOX

Change-Id: I77072f12b7734da6c0212a715633fee3ee574f65
This commit is contained in:
Tao Huang
2023-11-21 16:05:41 +08:00
8 changed files with 54 additions and 11 deletions

View File

@@ -257,6 +257,8 @@ CONFIG_COMMON_CLK_RK808=y
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_CPU_PX30 is not set
CONFIG_RPMSG_ROCKCHIP_SOFTIRQ=y
CONFIG_RPMSG_VIRTIO=y
CONFIG_CPU_RK3308=y
# CONFIG_CPU_RK3328 is not set
# CONFIG_CPU_RK3368 is not set

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@@ -501,7 +501,7 @@ CONFIG_MAILBOX=y
CONFIG_ROCKCHIP_MBOX=y
CONFIG_ROCKCHIP_IOMMU=y
CONFIG_ARM_SMMU_V3=y
CONFIG_RPMSG_ROCKCHIP=y
CONFIG_RPMSG_ROCKCHIP_MBOX=y
CONFIG_RPMSG_VIRTIO=y
CONFIG_CPU_PX30=y
CONFIG_CPU_RK1808=y

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@@ -47,6 +47,16 @@ static void clk_regmap_fractional_divider_approximation(struct clk_hw *hw,
struct clk_hw *p_parent;
unsigned long scale;
if (!rate) {
*m = 0;
*n = 1;
dev_dbg(fd->dev, "%s rate:(%ld) maybe invalid frequency setting!\n",
clk_hw_get_name(hw), rate);
return;
}
p_rate = clk_hw_get_rate(clk_hw_get_parent(hw));
if ((rate * 20 > p_rate) && (p_rate % rate != 0)) {
p_parent = clk_hw_get_parent(clk_hw_get_parent(hw));

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@@ -62,7 +62,7 @@
#define IMX577_REG_EXPOSURE_H 0x0202
#define IMX577_REG_EXPOSURE_L 0x0203
#define IMX577_EXPOSURE_MIN 4
#define IMX577_EXPOSURE_MIN 8
#define IMX577_EXPOSURE_STEP 1
#define IMX577_VTS_MAX 0xffff
@@ -2022,7 +2022,7 @@ static int imx577_set_ctrl(struct v4l2_ctrl *ctrl)
case V4L2_CID_VBLANK:
if (imx577->cur_mode->hdr_mode == NO_HDR) {
/* Update max exposure while meeting expected vblanking */
max = imx577->cur_mode->height + ctrl->val - 4;
max = imx577->cur_mode->height + ctrl->val - 22;
__v4l2_ctrl_modify_range(imx577->exposure,
imx577->exposure->minimum, max,
imx577->exposure->step,
@@ -2186,7 +2186,7 @@ static int imx577_initialize_controls(struct imx577 *imx577)
IMX577_VTS_MAX - mode->height,
1, vblank_def);
imx577->cur_vts = mode->vts_def;
exposure_max = mode->vts_def - 4;
exposure_max = mode->vts_def - 22;
imx577->exposure = v4l2_ctrl_new_std(handler, &imx577_ctrl_ops,
V4L2_CID_EXPOSURE, IMX577_EXPOSURE_MIN,
exposure_max, IMX577_EXPOSURE_STEP,

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@@ -2336,6 +2336,7 @@ static void dw_mci_tasklet_func(struct tasklet_struct *t)
((fifo_count >> 17) & 0x7FF) <= RV1106_RAMDON_DATA_SIZE / 4,
0, 5000 * USEC_PER_MSEC))
data->error = -ETIMEDOUT;
udelay(1);
dw_mci_reset(host);
}
send_stop_abort(host, data);

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@@ -555,6 +555,31 @@ static void rockchip_rtc_compensation_delay_work(struct work_struct *work)
return;
}
static bool rockchip_rtc_is_trimed(struct rockchip_rtc *rtc)
{
int ret, comp_done;
ret = regmap_read(rtc->regmap, RTC_CTRL, &comp_done);
if (ret) {
pr_err("%s: Failed to read RTC_CTRL: %d\n", __func__, ret);
return false;
}
return (comp_done & CLK32K_COMP_EN) == CLK32K_COMP_EN;
}
static void rockchip_rtc_trim_start(struct rockchip_rtc *rtc)
{
if (!rockchip_rtc_is_trimed(rtc))
queue_delayed_work(system_long_wq, &rtc->trim_work,
msecs_to_jiffies(5000));
}
static void __maybe_unused rockchip_rtc_trim_close(struct rockchip_rtc *rtc)
{
if (!rockchip_rtc_is_trimed(rtc))
cancel_delayed_work_sync(&rtc->trim_work);
}
/* Enable the alarm if it should be enabled (in case it was disabled to
* prevent use as a wake source).
*/
@@ -568,6 +593,8 @@ static int rockchip_rtc_suspend(struct device *dev)
if (device_may_wakeup(dev))
enable_irq_wake(rtc->irq);
rockchip_rtc_trim_close(rtc);
if (rtc->grf) {
switch (rtc->mode) {
case ROCKCHIP_RV1106_RTC:
@@ -610,6 +637,7 @@ static int rockchip_rtc_resume(struct device *dev)
dev_err(dev, "Cannot enable clock.\n");
return ret;
}
rockchip_rtc_trim_start(rtc);
return 0;
}
@@ -761,7 +789,7 @@ static int rockchip_rtc_probe(struct platform_device *pdev)
rtc->irq);
INIT_DELAYED_WORK(&rtc->trim_work, rockchip_rtc_compensation_delay_work);
queue_delayed_work(system_long_wq, &rtc->trim_work, 3000);
rockchip_rtc_trim_start(rtc);
return devm_rtc_register_device(rtc->rtc);
}

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@@ -763,6 +763,11 @@ static int fiq_debugger_cpu_offine_migrate_fiq(unsigned int cpu)
if ((sip_fiq_debugger_is_enabled()) &&
(sip_fiq_debugger_get_target_cpu() == cpu)) {
target_cpu = cpumask_any_but(cpu_online_mask, cpu);
if (target_cpu >= nr_cpu_ids) {
pr_err("%s: migrate fiq fail!\n", __func__);
return -EBUSY;
}
sip_fiq_debugger_switch_cpu(target_cpu);
}

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@@ -57,12 +57,9 @@ static int rockchip_cpuinfo_probe(struct platform_device *pdev)
}
cell = nvmem_cell_get(dev, "id");
if (IS_ERR(cell)) {
dev_err(dev, "failed to get id cell: %ld\n", PTR_ERR(cell));
if (PTR_ERR(cell) == -EPROBE_DEFER)
return PTR_ERR(cell);
return PTR_ERR(cell);
}
if (IS_ERR(cell))
return dev_err_probe(dev, PTR_ERR(cell), "failed to get id cell\n");
efuse_buf = nvmem_cell_read(cell, &len);
nvmem_cell_put(cell);
if (IS_ERR(efuse_buf))