ODROID-XU4: drm/exynos: add new HDMI PHY pll and resolutions + pre-build EDIDs

- 480x800   60hz
- 848x480   60hz
- 1024x600  60hz (the old one is 1024x600p43hz)
- 1152x864  75hz
- 1280x768  60hz
- 1400x1050 60hz
- 1792x1344 60hz
- 1920x800  60hz
- 1920x1080 24Hz
- 1920x1080 23.976Hz
- 1920x1200 60hz
- support for Vu5A
- support for Vu7A+

new file:   firmware/edid/480x800.bin
new file:   firmware/edid/640x480.bin
new file:   firmware/edid/720x480.bin
new file:   firmware/edid/720x576.bin
new file:   firmware/edid/800x480.bin
new file:   firmware/edid/800x600.bin
new file:   firmware/edid/848x480.bin
new file:   firmware/edid/1024x600.bin
new file:   firmware/edid/1024x768.bin
new file:   firmware/edid/1152x864_75hz.bin
new file:   firmware/edid/1280x1024.bin
new file:   firmware/edid/1280x720.bin
new file:   firmware/edid/1280x768.bin
new file:   firmware/edid/1280x800.bin
new file:   firmware/edid/1360x768.bin
new file:   firmware/edid/1366x768.bin
new file:   firmware/edid/1400x1050.bin
new file:   firmware/edid/1440x900.bin
new file:   firmware/edid/1600x1200.bin
new file:   firmware/edid/1600x900.bin
new file:   firmware/edid/1680x1050.bin
new file:   firmware/edid/1792x1344.bin
new file:   firmware/edid/1920x1080.bin
new file:   firmware/edid/1920x1080_23_976hz.bin
new file:   firmware/edid/1920x1080_24hz.bin
new file:   firmware/edid/1920x1080_50hz.bin
new file:   firmware/edid/1920x1200_30hz.bin
new file:   firmware/edid/1920x1200_60hz.bin
new file:   firmware/edid/1920x800.bin

To support Vu5A, a pixel clock, 33.9MHz is needed.
But, there is no exact hdmi phy table of exynos5422,
so the cloest table will be used as a workaround.

- Vu5A timing
Detailed mode: Clock 33.900 MHz, 476 mm x 268 mm
                800  844  932 1056 hborder 0
                480  483  489  535 vborder 0
               +hsync +vsync

To support Vu7A+, a pixel clock, 49MHz is needed.
But there is no exact hdmi phy table of exynos5422,
so the closest table of 50.04MHz will be used
as a workaround.

- Vu7A+ timing
Detailed mode (1) : Clock 49 MHz, 255 mm x 255 mm
               1024 1029 1042 1312 hborder 0
                600  602  605  622 vborder 0
               -hsync +vsync

- 1024x600 60hz timing
Detailed mode: Clock 50.400 MHz, 355 mm x 208 mm
               1024 1048 1184 1344 hborder 0
                600  601  604  625 vborder 0
               -hsync +vsync

Change-Id: I1278be0ef8812d709429f02f1738c73033e2d5a0
Signed-off-by: memeka <mihailescu2m@gmail.com>

drivers/gpu/drm/exynos/exynos_hdmi.c

@@ -421,6 +421,38 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 31490000,
+		.conf = {
+			0x01, 0xD1, 0x34, 0x74, 0x44, 0x3C, 0x3A, 0xC2,
+			0x81, 0xE8, 0x3B, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0xC3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 32000000,
+		.conf = {
+			0x01, 0x51, 0x28, 0x55, 0x44, 0x40, 0x00, 0xC8,
+			0x02, 0xC8, 0xF0, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x80, 0x25, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	/*
+	 * To support Vu5A, pixel clock 33.9MHz is needed
+	 * but we don't have the exact HDMI PHY table
+	 * so as a workaround, the closest table will be used.
+	 */
+	{
+		.pixel_clock = 33900000,
+		.conf = {
+			0x01, 0x51, 0x28, 0x55, 0x44, 0x40, 0x00, 0xC8,
+			0x02, 0xC8, 0xF0, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x80, 0x25, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 36000000,
 		.conf = {
@@ -439,6 +471,29 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0x9A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	/*
+	 * To support Vu7A+, pixel clock 49MHz is needed
+	 * but we don't have the exact HDMI PHY table
+	 * so as a workaround, the closest table will be used.
+	 */
+	{
+		.pixel_clock = 49000000,
+		.conf = {
+			0x01, 0x51, 0x2A, 0x32, 0x42, 0x30, 0x00, 0xC4,
+			0x83, 0xE8, 0xFC, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x7A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 50400000,
+		.conf = {
+			0x01, 0x51, 0x2A, 0x32, 0x42, 0x30, 0x00, 0xC4,
+			0x83, 0xE8, 0xFC, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x7A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 65000000,
 		.conf = {
@@ -467,7 +522,7 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 		},
 	},
 	{
-		.pixel_clock = 74176000,
+		.pixel_clock = 74170000,
 		.conf = {
 			0x01, 0xD1, 0x1F, 0x10, 0x40, 0x5B, 0xEF, 0xC8,
 			0x81, 0xE8, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
@@ -484,6 +539,15 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 80140000,
+		.conf = {
+			0x01, 0xD1, 0x21, 0x11, 0x40, 0x3C, 0x2F, 0xC8,
+			0x87, 0xE8, 0xC8, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x99, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 83500000,
 		.conf = {
@@ -493,6 +557,24 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0x4A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 84750000,
+		.conf = {
+			0x01, 0xD1, 0x23, 0x11, 0x40, 0x30, 0x1E, 0xC7,
+			0x84, 0xE8, 0xD4, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x48, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 85860000,
+		.conf = {
+			0x01, 0xD1, 0x24, 0x11, 0x40, 0x30, 0xD2, 0xC8,
+			0x84, 0xE8, 0xD5, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x48, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 88750000,
 		.conf = {
@@ -502,6 +584,24 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0x45, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 89750000,
+		.conf = {
+			0x01, 0xD1, 0x25, 0x11, 0x40, 0x30, 0x26, 0xC9,
+			0x83, 0xE8, 0xE0, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x89, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 104990000,
+		.conf = {
+			0x01, 0xD1, 0x2C, 0x12, 0x40, 0x78, 0xC3, 0xC2,
+			0x81, 0xE8, 0x06, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x3B, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 106500000,
 		.conf = {
@@ -511,6 +611,24 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 106560000,
+		.conf = {
+			0x01, 0xD1, 0x2C, 0x12, 0x40, 0x78, 0x73, 0xCA,
+			0x85, 0xE8, 0x0B, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 107800000,
+		.conf = {
+			0x01, 0x51, 0x2D, 0x15, 0x40, 0x01, 0x00, 0xC8,
+			0x82, 0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66,
+			0x54, 0xC7, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 108000000,
 		.conf = {
@@ -529,6 +647,33 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0x6A, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 119000000,
+		.conf = {
+			0x01, 0xD1, 0x31, 0x14, 0x40, 0x78, 0x41, 0xCB,
+			0x89, 0xE8, 0x28, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x68, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 122000000,
+		.conf = {
+			0x01, 0xD1, 0x33, 0x14, 0x40, 0x30, 0xF0, 0xC8,
+			0x85, 0xE8, 0x31, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x65, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 125590000,
+		.conf = {
+			0x01, 0xD1, 0x34, 0x14, 0x40, 0x78, 0x4F, 0xC2,
+			0x81, 0xE8, 0x3A, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x87, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 	{
 		.pixel_clock = 146250000,
 		.conf = {
@@ -547,6 +692,51 @@ static const struct hdmiphy_config hdmiphy_5420_configs[] = {
 			0x54, 0x4B, 0x25, 0x03, 0x00, 0x80, 0x01, 0x80,
 		},
 	},
+	{
+		.pixel_clock = 154000000,
+		.conf = {
+			0x01, 0xD1, 0x20, 0x01, 0x40, 0x30, 0x08, 0xCC,
+			0x8C, 0xE8, 0xC1, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x3F, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 162000000,
+		.conf = {
+			0x01, 0xD1, 0x22, 0x01, 0x40, 0x30, 0xD4, 0xCD,
+			0x89, 0xE8, 0xC9, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x31, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 164100000,
+		.conf = {
+			0x01, 0xD1, 0x22, 0x89, 0x49, 0xB0, 0x15, 0xCE,
+			0x8A, 0xF8, 0xCD, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x2B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 196900000,
+		.conf = {
+			0x01, 0xD1, 0x29, 0x1618, 0x418, 0x190, 0xF5, 0xCF,
+			0x8D, 0x168, 0xF5, 0xD8, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0xFA, 0x24, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 204800000,
+		.conf = {
+			0x01, 0xD1, 0x2B, 0x02, 0x40, 0x30, 0xE0, 0xC8,
+			0x85, 0xE8, 0x00, 0xD9, 0x45, 0xA0, 0xAC, 0x80,
+			0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x86,
+			0x54, 0x3C, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
 };
 
 static const struct hdmiphy_config hdmiphy_5433_configs[] = {