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usb: xhci: set the trb max transfer length to 4KB

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According to the "6.4 Transfer Request Block (TRB)" in xHCI
Specification, the max transfer length of a TRB is 64KB.
However, on Rockchip platforms which support xHCI in DWC3 IP
have problem if transfer more then 4KB in one TRB.

We don't know the root cause, maybe it's the DWC3 Tx/Rx FIFO
related, such as RK3399, it only support Tx FIFO 4136 Bytes
and Rx FIFO 3072 Bytes for SS Bus instance.

With the patch, it can make the xHCI transfer more stable on
Rockchip platforms, but it also cause transfer performance
loss. I test on RK3399 EVB Type-C USB 3.0 port with UAS USB 3.0
SSD, it cause 10% performance loss when use dd command to read/
write the UAS USB 3.0 SSD (350MBps -> 315MBps).

Change-Id: I11b10f6618d54d4cb0a778e5c0b4216227184e47
Signed-off-by: William Wu <william.wu@rock-chips.com>
This commit is contained in:
William Wu
2019-01-04 10:45:09 +08:00
committed by Tao Huang
parent 070cae6f80
commit 313d1b9f63
1 changed files with 4 additions and 0 deletions
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4
drivers/usb/host/xhci.h
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@@ -1491,7 +1491,11 @@ static inline const char *xhci_trb_type_string(u8 type)
#define TRB_SEGMENT_SIZE (TRBS_PER_SEGMENT*16)
#define TRB_SEGMENT_SHIFT (ilog2(TRB_SEGMENT_SIZE))
/* TRB buffer pointers can't cross 64KB boundaries */
#ifdef CONFIG_ARCH_ROCKCHIP
#define TRB_MAX_BUFF_SHIFT 12
#else
#define TRB_MAX_BUFF_SHIFT 16
#endif
#define TRB_MAX_BUFF_SIZE (1 << TRB_MAX_BUFF_SHIFT)
/* How much data is left before the 64KB boundary? */
#define TRB_BUFF_LEN_UP_TO_BOUNDARY(addr) (TRB_MAX_BUFF_SIZE - \