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clk: rockchip: rk3588: modify dclk max prate to 594M

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Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I3b96d53a89fd9e86a534b120b2e5f02a71c8848f
This commit is contained in:
Elaine Zhang
2021-12-20 15:02:34 +08:00
committed by Tao Huang
parent 2110967774
commit 3169038e48
1 changed files with 1 additions and 1 deletions
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drivers/clk/rockchip/clk-rk3588.c
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@@ -16,7 +16,7 @@
#define RK3588_GRF_SOC_STATUS0 0x600
#define RK3588_PHYREF_ALT_GATE 0xc38
#define RK3588_FRAC_MAX_PRATE 1500000000
#define RK3588_DCLK_MAX_PRATE 400000000
#define RK3588_DCLK_MAX_PRATE 594000000
enum rk3588_plls {
b0pll, b1pll, lpll, v0pll, aupll, cpll, gpll, npll, ppll,