mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-07 03:15:31 +09:00
ARM: dts: rockchip: support tp2855 and sc530ai for rv1106-evb-cvr-dual-cam.dtsi
based on rv1106g-evb1-v11-cvr.dts Signed-off-by: Su Yuefu <yuefu.su@rock-chips.com> Change-Id: I5e65e1ff7bc63838fa59cecd0f3c60634fbe8ac3
This commit is contained in:
Su Yuefu
@@ -987,6 +987,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
|
||||
rv1106g-evb1-v10.dtb \
|
||||
rv1106g-evb1-v11.dtb \
|
||||
rv1106g-evb1-v11-cvr.dtb \
|
||||
rv1106g-evb1-v11-cvr-dual-cam.dtb \
|
||||
rv1106g-evb1-v11-spi-nand-cvr.dtb \
|
||||
rv1106g-evb1-v11-sii902x-bt11202hdmi.dtb \
|
||||
rv1106g-evb1-v11-sii902x-rgb2hdmi.dtb \
|
||||
|
||||
296
arch/arm/boot/dts/rv1106-evb-cvr-dual-cam.dtsi
Normal file
296
arch/arm/boot/dts/rv1106-evb-cvr-dual-cam.dtsi
Normal file
@@ -0,0 +1,296 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
* Version Sensor I2C_ADDR Lanes
|
||||
* v1.0.0 sc530ai 0x30 lane0~1(dphy1)
|
||||
* tp2855 0x44 lane2~3(dphy2)
|
||||
*/
|
||||
|
||||
&csi2_dphy_hw {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dphy1 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input1: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&os04a10_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
csi_dphy_input2: endpoint@2 {
|
||||
reg = <2>;
|
||||
remote-endpoint = <&sc530ai_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&csi2_dphy2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_input3: endpoint@3 {
|
||||
reg = <3>;
|
||||
remote-endpoint = <&sc4336_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
csi_dphy_input4: endpoint@4 {
|
||||
reg = <4>;
|
||||
remote-endpoint = <&tp2855_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csi_dphy_output1: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi1_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4m2_xfer>;
|
||||
|
||||
os04a10: os04a10@36 {
|
||||
compatible = "ovti,os04a10";
|
||||
status = "okay";
|
||||
reg = <0x36>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
|
||||
pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT1607-PV1";
|
||||
rockchip,camera-module-lens-name = "50IRC-F16";
|
||||
port {
|
||||
os04a10_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input1>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sc4336: sc4336@30 {
|
||||
compatible = "smartsens,sc4336";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI1>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
|
||||
pwdn-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out1>;
|
||||
rockchip,camera-module-index = <1>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "OT01";
|
||||
rockchip,camera-module-lens-name = "40IRC_F16";
|
||||
port {
|
||||
sc4336_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input3>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sc530ai: sc530ai@30 {
|
||||
compatible = "smartsense,sc530ai";
|
||||
status = "okay";
|
||||
reg = <0x30>;
|
||||
clocks = <&cru MCLK_REF_MIPI0>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out0>;
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "CMK-OT1607-PV1";
|
||||
rockchip,camera-module-lens-name = "50IRC-F16";
|
||||
port {
|
||||
sc530ai_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input2>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tp2855_00: tp2855_00@44 {
|
||||
compatible = "techpoint,tp2855";
|
||||
status = "okay";
|
||||
reg = <0x44>;
|
||||
clocks = <&cru MCLK_REF_MIPI1>;
|
||||
clock-names = "xvclk";
|
||||
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_refclk_out1>;
|
||||
rockchip,camera-module-index = <1>;
|
||||
rockchip,camera-module-facing = "front";
|
||||
rockchip,camera-module-name = "tp2855";
|
||||
rockchip,camera-module-lens-name = "tp2855";
|
||||
port {
|
||||
tp2855_out: endpoint {
|
||||
remote-endpoint = <&csi_dphy_input4>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mipi1_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi1_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csi_dphy_output1>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi1_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mipi_pins>;
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds_sditf {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
mipi_lvds_sditf: endpoint {
|
||||
remote-endpoint = <&isp_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds1 {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
/* MIPI CSI-2 endpoint */
|
||||
cif_mipi_in1: endpoint {
|
||||
remote-endpoint = <&mipi1_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port@0 {
|
||||
isp_in: endpoint {
|
||||
remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
181
arch/arm/boot/dts/rv1106g-evb1-v11-cvr-dual-cam.dts
Normal file
181
arch/arm/boot/dts/rv1106g-evb1-v11-cvr-dual-cam.dts
Normal file
@@ -0,0 +1,181 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rv1106.dtsi"
|
||||
#include "rv1106-evb-v10.dtsi"
|
||||
#include "rv1106-evb-cvr-dual-cam.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RV1106G EVB1 V11 Board For CVR Dual Camera";
|
||||
compatible = "rockchip,rv1106g-evb1-v11-cvr-dual-cam", "rockchip,rv1106";
|
||||
|
||||
sdio_pwrseq: sdio-pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_enable_h &wifi_vbat>;
|
||||
|
||||
/*
|
||||
* On the module itself this is one of these (depending
|
||||
* on the actual card populated):
|
||||
* - SDIO_RESET_L_WL_REG_ON
|
||||
* - PDN (power down when low)
|
||||
*/
|
||||
post-power-on-delay-ms = <300>;
|
||||
reset-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>,
|
||||
<&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
vcc_1v8: vcc-1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_1v8";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vcc_3v3: vcc-3v3 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc_3v3";
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
vcc3v3_sd: vcc3v3-sd {
|
||||
compatible = "regulator-fixed";
|
||||
gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
|
||||
regulator-name = "vcc3v3_sd";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_pwren>;
|
||||
};
|
||||
|
||||
vccio_sd: vccio-sd {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "vccio_sd";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
states = <3300000 1
|
||||
1800000 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc_volt>;
|
||||
};
|
||||
|
||||
wireless_wlan: wireless-wlan {
|
||||
compatible = "wlan-platdata";
|
||||
wifi_chip_type = "rtl8189fs";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
WIFI,host_wake_irq = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
wifi_vbat: wifi-vbat {
|
||||
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc {
|
||||
/omit-if-no-ref/
|
||||
sdmmc_pwren: sdmmc-pwren {
|
||||
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
/omit-if-no-ref/
|
||||
sdmmc_volt: sdmmc-volt {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
usb_pwren: usb-pwren {
|
||||
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sdio {
|
||||
max-frequency = <200000000>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
sd-uhs-sdr104;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4 &clk_32k>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
max-frequency = <200000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
|
||||
sd-uhs-sdr12;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr50;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
/delete-node/ usb;
|
||||
};
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "spi-nand";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&u2phy_otg {
|
||||
/delete-property/ vbus-supply;
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vcc_1v8>;
|
||||
};
|
||||
Reference in New Issue
Block a user