Merge commit '76f17016d5792e27f3e86dbf3b6c02d935d93524'

* commit '76f17016d5792e27f3e86dbf3b6c02d935d93524':
  media: rockchip: hdmirx: select CEC_CORE
  driver: rknpu: Avoid taking an uninitialized lock
  arm64: dts: rockchip: rk3588-vehicle-evb-v22: change minipcie power supply
  ARM: dts: rockchip: add rv1106g-evb2-v12-dual-camera-avs.dts

Change-Id: I4873a1dcaa1b93074f5512b76065d437c5f5e2da
This commit is contained in:
Tao Huang
2023-12-27 15:00:50 +08:00
5 changed files with 135 additions and 8 deletions

View File

@@ -1154,6 +1154,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1106g-evb2-v11-emmc.dtb \
rv1106g-evb2-v11-trailcam-emmc.dtb \
rv1106g-evb2-v12-aov-spi-nor.dtb \
rv1106g-evb2-v12-dual-camera-avs.dtb \
rv1106g-evb2-v12-nofastae-emmc.dtb \
rv1106g-evb2-v12-nofastae-spi-nand.dtb \
rv1106g-evb2-v12-nofastae-spi-nor.dtb \

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@@ -0,0 +1,122 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106g-evb2-v10-dual-camera.dts"
/ {
model = "Rockchip RV1106G EVB2 V12 Board With Dual Camera AVS Blend Mode";
compatible = "rockchip,rv1106g-evb2-v12-dual-camera-avs", "rockchip,rv1106";
};
/delete-node/ &sc230ai;
/delete-node/ &sc301iot;
&csi2_dphy1 {
ports {
port@0 {
csi_dphy_input0: endpoint@0 {
remote-endpoint = <&sc230ai_30_out>;
};
};
};
};
&csi2_dphy2 {
ports {
port@0 {
csi_dphy_input1: endpoint@0 {
remote-endpoint = <&sc230ai_32_out>;
};
};
};
};
&i2c4 {
sc230ai_32: sc230ai_32@32 {
compatible = "smartsens,sc230ai";
status = "okay";
reg = <0x32>;
clocks = <&cru MCLK_REF_MIPI1>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out1>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2350-PC1";
rockchip,camera-module-lens-name = "65IRC-F16";
rockchip,camera-module-sync-mode = "slave";
port {
sc230ai_32_out: endpoint {
remote-endpoint = <&csi_dphy_input1>;
data-lanes = <1 2>;
};
};
};
sc230ai_30: sc230ai_30@30 {
compatible = "smartsens,sc230ai";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2350-PC1";
rockchip,camera-module-lens-name = "65IRC-F16";
rockchip,camera-module-sync-mode = "internal_master";
port {
sc230ai_30_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
};
};
};
&rkisp_thunderboot {
/* reg's offset MUST match with RTOS */
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 1920x1080: 0xa8c000
* 0x008b0000 = (meta's reg offset) + (meta's reg size)
* = 0x00800000 + 0xb0000
*/
reg = <0x008b0000 0xa8c000>;
};
&ramdisk_r {
/*
* 0x133c000 = (rkisp_thunderboot's reg offset)
* + (rkisp_thunderboot's reg size)
* = 0x008b0000 + 0xa8c000
*/
reg = <0x133c000 (15 * 0x00100000)>;
};
&ramdisk_c {
/*
* 0x223c000 = (ramdisk_r's reg offset)
* + (ramdisk_r's reg size)
* = 0x133c000 + (15 * 0x00100000)
*/
reg = <0x223c000 (6 * 0x00100000)>;
};
&rkisp1_thunderboot {
/*
* vicap, capture raw10, ceil(w*10/8/256)*256*h *4(buf num)
* e.g. 1920x1080: 0xa8c0000
* 0x283c000 = (ramdisk_c's reg offset) + (ramdisk_c's reg size)
* = 0x223c000 + (6 * 0x00100000)
*/
reg = <0x283c000 0xa8c000>;
};

View File

@@ -267,15 +267,15 @@
compatible = "regulator-fixed";
regulator-name = "minipcie_power_buck";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
//regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&nca9539_gpio 13 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
vin-supply = <&vcc5v0_buck>;
regulator-state-mem {
regulator-off-in-suspend;
regulator-suspend-microvolt = <12000000>;
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};

View File

@@ -21,6 +21,7 @@ config VIDEO_ROCKCHIP_HDMIRX
select VIDEOBUF2_DMA_CONTIG
select HDMI
select VIDEO_ROCKCHIP_HDMIRX_CLASS
select CEC_CORE
help
Support for Rockchip HDMI RX PHY and Controller.
This driver supports HDMI 2.0 version.

View File

@@ -235,13 +235,15 @@ static const struct of_device_id rockchip_npu_of_match[] = {
#if KERNEL_VERSION(6, 1, 0) <= LINUX_VERSION_CODE
void rknpu_devfreq_lock(struct rknpu_device *rknpu_dev)
{
rockchip_opp_dvfs_lock(&rknpu_dev->opp_info);
if (rknpu_dev->devfreq)
rockchip_opp_dvfs_lock(&rknpu_dev->opp_info);
}
EXPORT_SYMBOL(rknpu_devfreq_lock);
void rknpu_devfreq_unlock(struct rknpu_device *rknpu_dev)
{
rockchip_opp_dvfs_unlock(&rknpu_dev->opp_info);
if (rknpu_dev->devfreq)
rockchip_opp_dvfs_unlock(&rknpu_dev->opp_info);
}
EXPORT_SYMBOL(rknpu_devfreq_unlock);
@@ -332,6 +334,7 @@ int rknpu_devfreq_init(struct rknpu_device *rknpu_dev)
(void *)rknpu_dev);
if (IS_ERR(rknpu_dev->devfreq)) {
LOG_DEV_ERROR(dev, "failed to add devfreq\n");
rknpu_dev->devfreq = NULL;
ret = PTR_ERR(rknpu_dev->devfreq);
goto err_remove_governor;
}