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arm64: dts: renesas: beacon-rzg2m-kit: Rearrange SoC unique functions

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In preparation for adding new dev kits, move anything specific to the
RZ/G2M from the SOM-level and baseboard-levels and move them to the
kit-level.  This allows the SOM and baseboard to be reused with
other SoC's.

Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201224170502.2254683-6-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Adam Ford
2020-12-24 11:04:59 -06:00
committed by Geert Uytterhoeven
parent e718d56375
commit 33aaab6d5c
3 changed files with 20 additions and 20 deletions
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15
arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
View File

@@ -264,21 +264,6 @@
status = "okay";
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};
&du_out_rgb {
remote-endpoint = <&rgb_panel>;
};

5
arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi
View File

@@ -13,11 +13,6 @@
reg = <0x0 0x48000000 0x0 0x78000000>;
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x80000000>;
};
osc_32k: osc_32k {
compatible = "fixed-clock";
#clock-cells = <0>;

20
arch/arm64/boot/dts/renesas/r8a774a1-beacon-rzg2m-kit.dts
View File

@@ -26,6 +26,26 @@
chosen {
stdout-path = "serial0:115200n8";
};
memory@600000000 {
device_type = "memory";
reg = <0x6 0x00000000 0x0 0x80000000>;
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.2",
"dclkin.0", "dclkin.1", "dclkin.2";
};
/* Reference versaclock instead of audio_clk_a */