dts: ODROID-C4: Add odroid-c4 config files.

Change-Id: I1a3c8bebb6b7ca83cadfe4cf983f308956a7041f
This commit is contained in:
Luke Go
2019-06-19 15:55:02 +09:00
committed by Chris KIM
parent 3acd039728
commit 3477f40dec
6 changed files with 6576 additions and 0 deletions

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@@ -240,6 +240,13 @@ config ARCH_MESON64_ODROIDC3
This enables support for the board ODROID-C3 of Hardkernel
which is based on ARMv8 SoC of AMLogic, Inc.
config ARCH_MESON64_ODROIDC4
bool "Hardkkernel's ODROID-C4 Single Board Computer"
select ARCH_MESON64_ODROID_COMMON
help
This enables support for the board ODROID-C4 of Hardkernel
which is based on ARMv8 SoC of AMLogic, Inc.
config ARCH_MESON64_ODROIDN2
bool "Hardkkernel's ODROID-N2 Single Board Computer"
select ARCH_MESON64_ODROID_COMMON

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@@ -6,5 +6,7 @@ dtb-y += g12b_a311d_w400.dtb
dtb-y += g12b_a311d_w400_buildroot.dtb
dtb-$(CONFIG_ARCH_MESON64_ODROIDC3) += meson64_odroidc3.dtb
dtb-$(CONFIG_ARCH_MESON64_ODROIDC3) += meson64_odroidc3_android.dtb
dtb-$(CONFIG_ARCH_MESON64_ODROIDC4) += meson64_odroidc4.dtb
dtb-$(CONFIG_ARCH_MESON64_ODROIDC4) += meson64_odroidc4_android.dtb
dtb-$(CONFIG_ARCH_MESON64_ODROIDN2) += meson64_odroidn2.dtb
dtb-$(CONFIG_ARCH_MESON64_ODROIDN2) += meson64_odroidn2_android.dtb

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@@ -0,0 +1,666 @@
/*
* arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts
*
* Copyright (C) 2019 Hardkernel Co., Ltd. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
/dts-v1/;
#include "mesonsm1.dtsi"
#include "mesonsm1_odroid_common.dtsi"
/ {
model = "Hardkernel ODROID-C4";
compatible = "amlogic, g12a";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
chosen { };
memory@00000000 {
device_type = "memory";
linux,usable-memory = <0x0 0x000000 0x0 0x80000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global autoconfigured region for contiguous allocations */
ramoops@0x07400000 {
compatible = "ramoops";
reg = <0x0 0x07400000 0x0 0x00100000>;
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x20000>;
};
secmon_reserved:linux,secmon {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x400000>;
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
};
secos_reserved:linux,secos {
status = "disable";
compatible = "amlogic, aml_secos_memory";
reg = <0x0 0x05300000 0x0 0x2000000>;
no-map;
};
logo_reserved:linux,meson-fb {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x800000>;
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
};
ion_cma_reserved:linux,ion-dev {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x8000000>;
alignment = <0x0 0x400000>;
};
//di_reserved:linux,di {
//compatible = "amlogic, di-mem";
/* buffer_size = 3621952(yuv422 8bit) */
/* 4179008(yuv422 10bit full pack mode) */
/** 10x3621952=34.6M(0x23) support 8bit **/
/** 10x4736064=45.2M(0x2e) support 12bit **/
/** 10x4179008=40M(0x28) support 10bit **/
//size = <0x0 0x2800000>;
//no-map;
//};
/*di CMA pool */
di_cma_reserved:linux,di_cma {
compatible = "shared-dma-pool";
reusable;
/* buffer_size = 3621952(yuv422 8bit)
* | 4736064(yuv422 10bit)
* | 4074560(yuv422 10bit full pack mode)
* 10x3621952=34.6M(0x23) support 8bit
* 10x4736064=45.2M(0x2e) support 12bit
* 10x4074560=40M(0x28) support 10bit
*/
size = <0x0 0x02800000>;
alignment = <0x0 0x400000>;
};
/* POST PROCESS MANAGER */
ppmgr_reserved:linux,ppmgr {
compatible = "shared-dma-pool";
size = <0x0 0x0>;
};
codec_mm_cma:linux,codec_mm_cma {
compatible = "shared-dma-pool";
reusable;
/* ion_codec_mm max can alloc size 80M*/
size = <0x0 0x13400000>;
alignment = <0x0 0x400000>;
linux,contiguous-region;
};
/* codec shared reserved */
codec_mm_reserved:linux,codec_mm_reserved {
compatible = "amlogic, codec-mm-reserved";
size = <0x0 0x0>;
alignment = <0x0 0x100000>;
//no-map;
};
/* vdin0 CMA pool */
vdin0_cma_reserved:linux,vdin0_cma {
status = "disable";
compatible = "shared-dma-pool";
reusable;
/* 1920x1080x2x4 =16+4 M */
size = <0x0 0x04000000>;
alignment = <0x0 0x400000>;
};
/* vdin1 CMA pool */
vdin1_cma_reserved:linux,vdin1_cma {
status = "disable";
compatible = "shared-dma-pool";
reusable;
/* 1920x1080x2x4 =16 M */
size = <0x0 0x04000000>;
alignment = <0x0 0x400000>;
};
vm0_cma_reserved:linux,vm0_cma {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x2000000>;
alignment = <0x0 0x400000>;
};
};
cvbsout {
compatible = "amlogic, cvbsout-sm1";
dev_name = "cvbsout";
status = "okay";
clocks = <&clkc CLKID_VCLK2_ENCI
&clkc CLKID_VCLK2_VENCI0
&clkc CLKID_VCLK2_VENCI1
&clkc CLKID_DAC_CLK>;
clock-names = "venci_top_gate",
"venci_0_gate",
"venci_1_gate",
"vdac_clk_gate";
/* clk path */
/* 0:vid_pll vid2_clk */
/* 1:gp0_pll vid2_clk */
/* 2:vid_pll vid1_clk */
/* 3:gp0_pll vid1_clk */
clk_path = <0>;
/* performance: reg_address, reg_value */
/* sm1 */
performance = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x8080
0x1b05 0xfd
0x1c59 0xf850
0xffff 0x0>; /* ending flag */
performance_sarft = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x0
0x1b05 0x9
0x1c59 0xfc48
0xffff 0x0>; /* ending flag */
performance_revB_telecom = <0x1bf0 0x9
0x1b56 0x546
0x1b12 0x8080
0x1b05 0x9
0x1c59 0xf850
0xffff 0x0>; /* ending flag */
};
deinterlace {
compatible = "amlogic, deinterlace";
status = "okay";
/* 0:use reserved; 1:use cma; 2:use cma as reserved */
flag_cma = <1>;
//memory-region = <&di_reserved>;
memory-region = <&di_cma_reserved>;
interrupts = <0 46 1
0 40 1>;
interrupt-names = "pre_irq", "post_irq";
clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
<&clkc CLKID_VPU_CLKB_COMP>;
clock-names = "vpu_clkb_tmp_composite",
"vpu_clkb_composite";
clock-range = <334 667>;
/* buffer-size = <3621952>;(yuv422 8bit) */
buffer-size = <4074560>;/*yuv422 fullpack*/
/* reserve-iomap = "true"; */
/* if enable nr10bit, set nr10bit-support to 1 */
post-wr-support = <1>;
nr10bit-support = <1>;
nrds-enable = <1>;
pps-enable = <1>;
};
unifykey{
compatible = "amlogic, unifykey";
status = "ok";
unifykey-num = <14>;
unifykey-index-0 = <&keysn_0>;
unifykey-index-1 = <&keysn_1>;
unifykey-index-2 = <&keysn_2>;
unifykey-index-3 = <&keysn_3>;
unifykey-index-4 = <&keysn_4>;
unifykey-index-5 = <&keysn_5>;
unifykey-index-6 = <&keysn_6>;
unifykey-index-7 = <&keysn_7>;
unifykey-index-8 = <&keysn_8>;
unifykey-index-9 = <&keysn_9>;
unifykey-index-10= <&keysn_10>;
unifykey-index-11= <&keysn_11>;
unifykey-index-12= <&keysn_12>;
unifykey-index-13= <&keysn_13>;
unifykey-index-14= <&keysn_14>;
unifykey-index-15= <&keysn_15>;
unifykey-index-16= <&keysn_16>;
keysn_0: key_0{
key-name = "usid";
key-device = "normal";
key-permit = "read","write","del";
};
keysn_1:key_1{
key-name = "mac";
key-device = "normal";
key-permit = "read","write","del";
};
keysn_2:key_2{
key-name = "hdcp";
key-device = "secure";
key-type = "sha1";
key-permit = "read","write","del";
};
keysn_3:key_3{
key-name = "secure_boot_set";
key-device = "efuse";
key-permit = "write";
};
keysn_4:key_4{
key-name = "mac_bt";
key-device = "normal";
key-permit = "read","write","del";
key-type = "mac";
};
keysn_5:key_5{
key-name = "mac_wifi";
key-device = "normal";
key-permit = "read","write","del";
key-type = "mac";
};
keysn_6:key_6{
key-name = "hdcp2_tx";
key-device = "normal";
key-permit = "read","write","del";
};
keysn_7:key_7{
key-name = "hdcp2_rx";
key-device = "normal";
key-permit = "read","write","del";
};
keysn_8:key_8{
key-name = "widevinekeybox";
key-device = "secure";
key-permit = "read","write","del";
};
keysn_9:key_9{
key-name = "deviceid";
key-device = "normal";
key-permit = "read","write","del";
};
keysn_10:key_10{
key-name = "hdcp22_fw_private";
key-device = "secure";
key-permit = "read","write","del";
};
keysn_11:key_11{
key-name = "PlayReadykeybox25";
key-device = "secure";
key-permit = "read","write","del";
};
keysn_12:key_12{
key-name = "prpubkeybox";// PlayReady
key-device = "secure";
key-permit = "read","write","del";
};
keysn_13:key_13{
key-name = "prprivkeybox";// PlayReady
key-device = "secure";
key-permit = "read","write","del";
};
keysn_14:key_14{
key-name = "attestationkeybox";// attestation key
key-device = "secure";
key-permit = "read","write","del";
};
keysn_15:key_15{
key-name = "region_code";
key-device = "normal";
key-permit = "read","write","del";
};
keysn_16:key_16{
key-name = "netflix_mgkid";
key-device = "secure";
key-permit = "read","write","del";
};
};//End unifykey
amlvecm {
compatible = "amlogic, vecm";
dev_name = "aml_vecm";
status = "okay";
gamma_en = <0>;/*1:enabel ;0:disable*/
wb_en = <0>;/*1:enabel ;0:disable*/
cm_en = <0>;/*1:enabel ;0:disable*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
};
amdolby_vision {
compatible = "amlogic, dolby_vision_sm1";
dev_name = "aml_amdolby_vision_driver";
status = "okay";
tv_mode = <0>;/*1:enabel ;0:disable*/
};
meson-fb {
compatible = "amlogic, meson-g12a";
/*memory-region = <&logo_reserved>;*/
dev_name = "meson-fb";
status = "okay";
interrupts = <0 3 1
0 56 1
0 89 1>;
interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>;
/* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
display_mode_default = "1080p60hz";
scale_mode = <1>;
/** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
display_size_default = <1920 1080 1920 2160 32>;
/*1920*1080*4*3 = 0x17BB000*/
pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
mem_alloc = <1>;
logo_addr = "0x3f800000";
clocks = <&clkc CLKID_VPU_CLKC_MUX>;
clock-names = "vpu_clkc";
};
p_tsensor: p_tsensor@ff634594 {
compatible = "amlogic, r1p1-tsensor";
device_name = "meson-pthermal";
status = "okay";
reg = <0x0 0xff634800 0x0 0x50>,
<0x0 0xff800268 0x0 0x4>;
cal_type = <0x1>;
cal_a = <324>;
cal_b = <424>;
cal_c = <3159>;
cal_d = <9411>;
rtemp = <115000>;
interrupts = <0 35 0>;
clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
clock-names = "ts_comp";
#thermal-sensor-cells = <1>;
};
d_tsensor: d_tsensor@ff800228 {
compatible = "amlogic, r1p1-tsensor";
device_name = "meson-dthermal";
status = "okay";
reg = <0x0 0xff634c00 0x0 0x50>,
<0x0 0xff800230 0x0 0x4>;
cal_type = <0x1>;
cal_a = <324>;
cal_b = <424>;
cal_c = <3159>;
cal_d = <9411>;
rtemp = <115000>;
interrupts = <0 36 0>;
clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
clock-names = "ts_comp";
#thermal-sensor-cells = <1>;
};
meson_cooldev: meson-cooldev@0 {
status = "okay";
compatible = "amlogic, meson-cooldev";
device_name = "mcooldev";
cooling_devices {
cpufreq_cool_cluster0 {
min_state = <1000000>;
dyn_coeff = <115>;
cluster_id = <0>;
node_name = "cpufreq_cool0";
device_type = "cpufreq";
};
cpucore_cool_cluster0 {
min_state = <1>;
dyn_coeff = <0>;
cluster_id = <0>;
node_name = "cpucore_cool0";
device_type = "cpucore";
};
gpufreq_cool {
min_state = <400>;
dyn_coeff = <358>;
gpu_pp = <2>;
cluster_id = <0>;
node_name = "gpufreq_cool0";
device_type = "gpufreq";
};
gpucore_cool {
min_state = <1>;
dyn_coeff = <0>;
cluster_id = <0>;
node_name = "gpucore_cool0";
device_type = "gpucore";
};
};
cpufreq_cool0:cpufreq_cool0 {
#cooling-cells = <2>; /* min followed by max */
};
cpucore_cool0:cpucore_cool0 {
#cooling-cells = <2>; /* min followed by max */
};
gpufreq_cool0:gpufreq_cool0 {
#cooling-cells = <2>; /* min followed by max */
};
gpucore_cool0:gpucore_cool0 {
#cooling-cells = <2>; /* min followed by max */
};
};
/*meson cooling devices end*/
thermal-zones {
soc_thermal: soc_thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
sustainable-power = <1460>;
thermal-sensors = <&p_tsensor 0>;
trips {
pswitch_on: trip-point@0 {
temperature = <60000>;
hysteresis = <5000>;
type = "passive";
};
pcontrol: trip-point@1 {
temperature = <75000>;
hysteresis = <5000>;
type = "passive";
};
phot: trip-point@2 {
temperature = <85000>;
hysteresis = <5000>;
type = "hot";
};
pcritical: trip-point@3 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
cpufreq_cooling_map {
trip = <&pcontrol>;
cooling-device = <&cpufreq_cool0 0 4>;
contribution = <1024>;
};
cpucore_cooling_map {
trip = <&pcontrol>;
cooling-device = <&cpucore_cool0 0 3>;
contribution = <1024>;
};
gpufreq_cooling_map {
trip = <&pcontrol>;
cooling-device = <&gpufreq_cool0 0 4>;
contribution = <1024>;
};
gpucore_cooling_map {
trip = <&pcontrol>;
cooling-device = <&gpucore_cool0 0 2>;
contribution = <1024>;
};
};
};
ddr_thermal: ddr_thermal {
polling-delay = <2000>;
polling-delay-passive = <1000>;
sustainable-power = <1460>;
thermal-sensors = <&d_tsensor 1>;
trips {
dswitch_on: trip-point@0 {
temperature = <60000>;
hysteresis = <5000>;
type = "passive";
};
dcontrol: trip-point@1 {
temperature = <75000>;
hysteresis = <5000>;
type = "passive";
};
dhot: trip-point@2 {
temperature = <85000>;
hysteresis = <5000>;
type = "hot";
};
dcritical: trip-point@3 {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
};
/*thermal zone end*/
cpu_opp_table0: cpu_opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp00 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <730000>;
};
opp01 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <730000>;
};
opp02 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <730000>;
};
opp03 {
opp-hz = /bits/ 64 <667000000>;
opp-microvolt = <750000>;
};
opp04 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <770000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <780000>;
};
opp06 {
opp-hz = /bits/ 64 <1404000000>;
opp-microvolt = <790000>;
};
opp07 {
opp-hz = /bits/ 64 <1512000000>;
opp-microvolt = <800000>;
};
opp08 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <810000>;
};
opp09 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <850000>;
};
opp10 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <900000>;
};
opp11 {
opp-hz = /bits/ 64 <1908000000>;
opp-microvolt = <950000>;
};
};
cpufreq-meson {
compatible = "amlogic, cpufreq-meson";
pinctrl-names = "default";
pinctrl-0 = <&pwm_ao_d_pins3>;
status = "okay";
};
}; /* end of / */
&uart_A {
status = "okay";
};
&sd_emmc_c {
status = "okay";
emmc {
caps = "MMC_CAP_8_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_b1 {
status = "okay";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
f_min = <400000>;
f_max = <50000000>;
};
};
&sd_emmc_a {
status = "okay";
sdio {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
f_min = <400000>;
f_max = <200000000>;
};
};
&sd_emmc_b2 {
status = "okay";
sd {
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED";
vol_switch = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
vol_switch_18 = <1>;
f_min = <400000>;
f_max = <100000000>;
};
};
&meson_cooldev {
status = "okay";
};

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@@ -0,0 +1,78 @@
/*
* arch/arm64/boot/dts/amlogic/meson64_odroidc4_android.dts
*
* Copyright (C) 2019 Hardkernel Co., Ltd. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
#include "meson64_odroidc4.dts"
/ {
firmware {
android {
compatible = "android,firmware";
vbmeta {
compatible = "android,vbmeta";
parts = "boot,system,vendor";
by_name_prefix="/dev/block";
};
fstab {
compatible = "android,fstab";
system {
compatible = "android,system";
dev = "/dev/block/system";
type = "ext4";
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
fsmgr_flags = "wait";
};
vendor {
compatible = "android,vendor";
dev = "/dev/block/vendor";
type = "ext4";
mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
fsmgr_flags = "wait";
};
odm {
compatible = "android,odm";
dev = "/dev/block/odm";
type = "vfat";
mnt_flags = "rw";
fsmgr_flags = "wait";
};
};
};
};
};
&custom_maps {
mapnum = <1>;
map0 = <&map_0>;
map_0: map_0 {
mapname = "hardkernel-remote";
customcode = <0x4db2>;
release_delay = <80>;
size = <12>;
keymap = <REMOTE_KEY(0x88,113)
REMOTE_KEY(0xdc,116)
REMOTE_KEY(0xc5,139)
REMOTE_KEY(0x9a,158)
REMOTE_KEY(0xca,103)
REMOTE_KEY(0x99,105)
REMOTE_KEY(0xc1,106)
REMOTE_KEY(0xd2,108)
REMOTE_KEY(0x80,104)
REMOTE_KEY(0x81,109)
REMOTE_KEY(0x82,102)
REMOTE_KEY(0xce,97)>;
};
};

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@@ -0,0 +1,499 @@
/*
* arch/arm64/boot/dts/amlogic/mesong12_odroid_common.dtsi
*
* Copyright (C) 2018 Hardkernel Co,. Ltd. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
*/
/ {
aliases {
serial0 = &uart_AO;
serial1 = &uart_A;
serial2 = &uart_B;
serial3 = &uart_C;
serial4 = &uart_AO_B;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c_AO;
tsensor0 = &p_tsensor;
tsensor1 = &d_tsensor;
spi0 = &spicc0;
spi1 = &spicc1;
};
gpiomem {
compatible = "amlogic, gpiomem";
reg = <0x0 0xff634000 0x0 0x1000>;
status = "okay";
};
codec_mm {
compatible = "amlogic, codec, mm";
memory-region = <&codec_mm_cma &codec_mm_reserved>;
dev_name = "codec_mm";
status = "okay";
};
ppmgr {
compatible = "amlogic, ppmgr";
memory-region = <&ppmgr_reserved>;
dev_name = "ppmgr";
status = "okay";
};
ionvideo {
compatible = "amlogic, ionvideo";
dev_name = "ionvideo";
status = "okay";
};
/* Audio Related start */
dummy_codec:dummy{
#sound-dai-cells = <0>;
compatible = "amlogic, aml_dummy_codec";
status = "okay";
};
amlogic_codec:t9015{
#sound-dai-cells = <0>;
compatible = "amlogic, aml_codec_T9015";
reg = <0x0 0xFF632000 0x0 0x2000>;
is_auge_used = <1>; /* meson or auge chipset used */
tdmout_index = <2>;
status = "okay";
};
audio_effect:eqdrc{
/*eq_enable = <1>;*/
/*drc_enable = <1>;*/
/*
* 0:tdmout_a
* 1:tdmout_b
* 2:tdmout_c
* 3:spdifout
* 4:spdifout_b
*/
eqdrc_module = <1>;
/* max 0xf, each bit for one lane, usually one lane */
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0x3>;
};
auge_sound {
compatible = "amlogic, g12a-sound-card";
aml-audio-card,name = "AML-AUGESOUND";
/*line-out mute gpio*/
mute_gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
/*for audio effect ,eqdrc */
aml-audio-card,effect = <&audio_effect>;
aml-audio-card,dai-link@0 {
format = "i2s";// "dsp_a";
mclk-fs = <256>;
bitclock-master = <&aml_tdmc>;
frame-master = <&aml_tdmc>;
continuous-clock;
/* suffix-name, sync with android audio hal
* what's the dai link used for
*/
suffix-name = "alsaPORT-i2s";
cpu {
sound-dai = <&aml_tdmc>;
dai-tdm-slot-tx-mask = <1 1>;
dai-tdm-slot-rx-mask = <1 1>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <32>;
system-clock-frequency = <12288000>;
};
codec {
sound-dai = <&amlogic_codec>;
};
};
/* spdif_b to hdmi, only playback */
aml-audio-card,dai-link@1 {
mclk-fs = <128>;
continuous-clock;
/* suffix-name, sync with android audio hal
* what's the dai link used for
*/
suffix-name = "alsaPORT-spdifb2hdmi";
cpu {
sound-dai = <&spdifb>;
system-clock-frequency = <6144000>;
};
codec {
sound-dai = <&dummy_codec>;
};
};
/* spdif_out GPIOA_11 */
aml-audio-card,dai-link@2 {
mclk-fs = <128>;
/* suffix-name, sync with android audio hal
* what's the dai link used for
*/
suffix-name = "alsaPORT-spdif";
cpu {
sound-dai = <&spdifa>;
system-clock-frequency = <6144000>;
};
codec {
sound-dai = <&dummy_codec>;
};
};
};
audiolocker: locker {
compatible = "amlogic, audiolocker";
clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT
&clkaudio CLKID_AUDIO_LOCKER_IN
&clkaudio CLKID_AUDIO_MCLK_D
&clkaudio CLKID_AUDIO_MCLK_E
&clkc CLKID_MPLL1
&clkc CLKID_MPLL2>;
clock-names = "lock_out", "lock_in", "out_src",
"in_src", "out_calc", "in_ref";
interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "irq";
frequency = <49000000>; /* pll */
dividor = <49>; /* locker's parent */
status = "okay";
};
/* Audio Related end */
leds {
compatible = "gpio-leds";
blueled {
label = "blue:heartbeat";
gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
gpio-reset {
compatible = "linux,gpio-reset";
usb_hub_en {
gpios = <&gpio GPIOH_5 GPIO_ACTIVE_HIGH>;
asserted-state = <0>;
duration-ms = <100>;
};
usb_hub {
gpios = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>;
asserted-state = <0>;
duration-ms = <100>;
};
};
efuse: efuse{
compatible = "amlogic, efuse";
read_cmd = <0x82000030>;
write_cmd = <0x82000031>;
get_max_cmd = <0x82000033>;
key = <&efusekey>;
status = "okay";
};
efusekey:efusekey{
keynum = <1>;
key0 = <&key_0>;
key_0: key_0 {
keyname = "uuid";
offset = <0>;
size = <32>;
};
};//End efusekey
onewire:onewire {
compatible = "w1-gpio";
gpios = <&gpio GPIOA_13 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
pwmgpio:pwmgpio {
compatible = "pwm-gpio";
#pwm-cells = <3>;
pwm-gpios = <&gpio_ao GPIOAO_10 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&ethmac {
status = "okay";
pinctrl-names = "external_eth_pins";
pinctrl-0 = <&external_eth_pins>;
mc_val = <0x1621>;
internal_phy=<0>;
/* reset */
rst_pin-gpios = <&gpio GPIOZ_15 GPIO_ACTIVE_LOW>;
};
/*if you want to use vdin just modify status to "ok"*/
&vdin0 {
memory-region = <&vdin0_cma_reserved>;
status = "disable";
/*vdin write mem color depth support:
*bit0:support 8bit
*bit1:support 9bit
*bit2:support 10bit
*bit3:support 12bit
*bit4:support yuv422 10bit full pack mode (from txl new add)
*/
tv_bit_mode = <0x15>;
};
&vdin1 {
memory-region = <&vdin1_cma_reserved>;
status = "disable";
/*vdin write mem color depth support:
*bit0:support 8bit
*bit1:support 9bit
*bit2:support 10bit
*bit3:support 12bit
*/
tv_bit_mode = <1>;
};
&pwm_cd {
status = "okay";
pinctrl-names = "pwm_pins","gpio_periphs";
pinctrl-0 = <&pwm_c_pins2 &pwm_d_pins2>;
pinctrl-1 = <&pwmcd_to_gpios>;
};
&pwm_ef {
status = "okay";
pinctrl-names = "pwm_pins","gpio_periphs";
pinctrl-0 = <&pwm_e_pins &pwm_f_pins1>;
pinctrl-1 = <&pwmef_to_gpios>;
};
&pwm_AO_cd {
status = "okay";
};
&i2c3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c3_master_pins2>;
clock-frequency = <100000>; /* default 100k */
pcf8563: rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
&usb2_phy_v2 {
status = "okay";
portnum = <2>;
};
&usb3_phy_v2 {
status = "okay";
portnum = <1>;
otg = <1>;
gpio-vbus-power = "GPIOH_6";
gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>;
};
&dwc3 {
status = "okay";
};
&dwc2_a {
status = "okay";
/** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/
controller-type = <3>;
};
&pcie_A {
reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>;
status = "disable";
};
&sd_emmc_c {
status = "okay";
mmc-ddr-1_8v;
mmc-hs200-1_8v;
emmc {
caps = "MMC_CAP_8_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE",
"MMC_CAP_1_8V_DDR",
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200_1_8V_SDR",
"MMC_CAP2_BROKEN_VOLTAGE";
f_min = <400000>;
f_max = <200000000>;
hw_reset = <&gpio BOOT_12 GPIO_ACTIVE_HIGH>;
};
};
&audiobus {
/* tdmc to internal DAC output, no pinmux */
aml_tdmc: tdmc {
compatible = "amlogic, g12a-snd-tdmc";
#sound-dai-cells = <0>;
dai-tdm-lane-slot-mask-in = <0 1 0 0>;
dai-tdm-lane-slot-mask-out = <1 0 0 0>;
dai-tdm-clk-sel = <2>;
clocks = <&clkaudio CLKID_AUDIO_MCLK_C
&clkc CLKID_MPLL2>;
clock-names = "mclk", "clk_srcpll";
i2s2hdmi = <1>;
status = "okay";
};
spdifa: spdif@0 {
compatible = "amlogic, sm1-snd-spdif-a";
#sound-dai-cells = <0>;
clocks = <&clkc CLKID_MPLL0
&clkc CLKID_FCLK_DIV4
&clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
&clkaudio CLKID_AUDIO_SPDIFOUT_A>;
clock-names = "sysclk", "fixed_clk", "gate_spdifin",
"gate_spdifout", "clk_spdifin", "clk_spdifout";
interrupts =
<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "irq_spdifin";
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout>;
status = "okay";
};
spdifb: spdif@1 {
compatible = "amlogic, sm1-snd-spdif-b";
#sound-dai-cells = <0>;
clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/
&clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B
&clkaudio CLKID_AUDIO_SPDIFOUT_B>;
clock-names = "sysclk",
"gate_spdifout", "clk_spdifout";
status = "okay";
};
aml_loopback: loopback {
compatible = "amlogic, snd-loopback";
/*
* 0: out rate = in data rate;
* 1: out rate = loopback data rate;
*/
lb_mode = <0>;
/* datain src
* 0: tdmin_a;
* 1: tdmin_b;
* 2: tdmin_c;
* 3: spdifin;
* 4: pdmin;
*/
datain_src = <4>;
datain_chnum = <8>;
datain_chmask = <0x3f>;
/* tdmin_lb src
* 0: tdmoutA
* 1: tdmoutB
* 2: tdmoutC
* 3: PAD_tdminA
* 4: PAD_tdminB
* 5: PAD_tdminC
*/
datalb_src = <2>;
datalb_chnum = <8>;
datalb_chmask = <0x3>;
status = "disabled";
};
asrca: resample {
compatible = "amlogic, sm1-resample";
clocks = <&clkc CLKID_MPLL3
&clkaudio CLKID_AUDIO_MCLK_F
&clkaudio CLKID_AUDIO_RESAMPLE_A>;
clock-names = "resample_pll", "resample_src", "resample_clk";
/*same with toddr_src
* TDMIN_A, 0
* TDMIN_B, 1
* TDMIN_C, 2
* SPDIFIN, 3
* PDMIN, 4
* NONE,
* TDMIN_LB, 6
* LOOPBACK, 7
*/
resample_module = <4>;
status = "disabled";
};
aml_pwrdet: pwrdet {
compatible = "amlogic, sm1-power-detect";
interrupts = <GIC_SPI 155 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pwrdet_irq";
/* pwrdet source sel
* 7: loopback;
* 6: tdmin_lb;
* 5: reserved;
* 4: pdmin;
* 3: spdifin;
* 2: tdmin_c;
* 1: tdmin_b;
* 0: tdmin_a;
*/
pwrdet_src = <4>;
hi_th = <0x70000>;
lo_th = <0x16000>;
status = "disabled";
};
}; /* end of audiobus */
&audio_data {
status = "okay";
};
&pinctrl_periphs {
i2c3_master_pins2:i2c3_pins2 {
mux {
drive-strength = <3>;
};
};
spdifout: spdifout {
mux {/* GPIOA_11 */
groups = "spdif_out_a11";
function = "spdif_out";
};
};
pwmcd_to_gpios:pwmcd_gpio {
mux {
groups = "GPIOX_5", "GPIOX_6";
function = "gpio_periphs";
};
};
pwmef_to_gpios:pwmef_gpio {
mux {
groups = "GPIOX_16", "GPIOX_7";
function = "gpio_periphs";
};
};
}; /* end of pinctrl_periphs */

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