shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 03:40:35 +09:00
Code Issues Packages Projects Releases Wiki Activity

UPSTREAM: drm: bridge: dw-hdmi: Detect AHB audio DMA using correct register

Browse Source 
Bit 0 in CONFIG1_ID tells whether the IP core uses an AHB slave
interface for control. The correct way to identify AHB audio DMA support
is through bit 1 in CONFIG3_ID.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-15-laurent.pinchart+renesas@ideasonboard.com

Change-Id: Iafac3a0d301fdd8e8a217da3c9a49b829cdd2edc
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry pick from 0c674948b7)
This commit is contained in:
Laurent Pinchart
2017-01-17 10:29:04 +02:00
committed by Zheng Yang
parent 98ef5b0ab2
commit 35fa89ce46
2 changed files with 7 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/drm/bridge/dw-hdmi.c
View File

@@ -2406,7 +2406,7 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
u8 prod_id0;
u8 prod_id1;
u8 config0;
u8 config1;
u8 config3;
hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
if (!hdmi)
@@ -2572,9 +2572,9 @@ int dw_hdmi_bind(struct device *dev, struct device *master,
pdevinfo.id = PLATFORM_DEVID_AUTO;
config0 = hdmi_readb(hdmi, HDMI_CONFIG0_ID);
config1 = hdmi_readb(hdmi, HDMI_CONFIG1_ID);
config3 = hdmi_readb(hdmi, HDMI_CONFIG3_ID);
if (config1 & HDMI_CONFIG1_AHB) {
if (config3 & HDMI_CONFIG3_AHBAUDDMA) {
struct dw_hdmi_audio_data audio;
audio.phys = iores->start;

4
drivers/gpu/drm/bridge/dw-hdmi.h
View File

@@ -570,6 +570,10 @@ enum {
/* CONFIG1_ID field values */
HDMI_CONFIG1_AHB = 0x01,
/* CONFIG3_ID field values */
HDMI_CONFIG3_AHBAUDDMA = 0x02,
HDMI_CONFIG3_GPAUD = 0x01,
/* IH_FC_INT2 field values */
HDMI_IH_FC_INT2_OVERFLOW_MASK = 0x03,
HDMI_IH_FC_INT2_LOW_PRIORITY_OVERFLOW = 0x02,