shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-09 04:10:18 +09:00
Code Issues Packages Projects Releases Wiki Activity

rk3368 lcdc:

Browse Source 
1. check act and size in win2 win3 layer;
    2. add support yuv420sp nv21 data format;
    3. in read bit func,not need to backup reg;
    4. complete get win state func;

Signed-off-by: hjc <hjc@rock-chips.com>
This commit is contained in:
hjc
2015-03-09 15:04:04 +08:00
parent 367a5c837d
commit 36841c672b
2 changed files with 38 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

43
drivers/video/rockchip/lcdc/rk3368_lcdc.c
View File

@@ -1086,7 +1086,7 @@ static int rk3368_win_0_1_reg_update(struct rk_lcdc_driver *dev_drv, int win_id)
}
mask = m_WIN0_EN | m_WIN0_DATA_FMT | m_WIN0_FMT_10 |
m_WIN0_LB_MODE | m_WIN0_RB_SWAP | m_WIN0_X_MIRROR |
m_WIN0_Y_MIRROR | m_WIN0_CSC_MODE;
m_WIN0_Y_MIRROR | m_WIN0_CSC_MODE |m_WIN0_UV_SWAP;
val = v_WIN0_EN(win->state) |
v_WIN0_DATA_FMT(win->area[0].fmt_cfg) |
v_WIN0_FMT_10(win->fmt_10) |
@@ -1094,7 +1094,8 @@ static int rk3368_win_0_1_reg_update(struct rk_lcdc_driver *dev_drv, int win_id)
v_WIN0_RB_SWAP(win->area[0].swap_rb) |
v_WIN0_X_MIRROR(win->mirror_en) |
v_WIN0_Y_MIRROR(win->mirror_en) |
v_WIN0_CSC_MODE(win->csc_mode);
v_WIN0_CSC_MODE(win->csc_mode) |
v_WIN0_UV_SWAP(win->area[0].swap_uv);
lcdc_msk_reg(lcdc_dev, WIN0_CTRL0 + off, mask, val);
mask = m_WIN0_BIC_COE_SEL |
@@ -2682,7 +2683,7 @@ static int win_0_1_set_par(struct lcdc_device *lcdc_dev,
struct rk_screen *screen, struct rk_lcdc_win *win)
{
u32 xact, yact, xvir, yvir, xpos, ypos;
u8 fmt_cfg = 0, swap_rb;
u8 fmt_cfg = 0, swap_rb, swap_uv = 0;
char fmt[9] = "NULL";
xpos = dsp_x_pos(win->mirror_en, screen, &win->area[0]);
@@ -2741,6 +2742,12 @@ static int win_0_1_set_par(struct lcdc_device *lcdc_dev,
swap_rb = 0;
win->fmt_10 = 0;
break;
case YUV420_NV21:
fmt_cfg = 4;
swap_rb = 0;
swap_uv = 1;
win->fmt_10 = 0;
break;
case YUV444:
fmt_cfg = 6;
swap_rb = 0;
@@ -2768,6 +2775,7 @@ static int win_0_1_set_par(struct lcdc_device *lcdc_dev,
}
win->area[0].fmt_cfg = fmt_cfg;
win->area[0].swap_rb = swap_rb;
win->area[0].swap_uv = swap_uv;
win->area[0].dsp_stx = xpos;
win->area[0].dsp_sty = ypos;
xact = win->area[0].xact;
@@ -2852,7 +2860,16 @@ static int win_2_3_set_par(struct lcdc_device *lcdc_dev,
win->area[i].dsp_sty =
dsp_y_pos(win->mirror_en, screen,
&win->area[i]);
if ((win->area[i].xact != win->area[i].xsize) ||
(win->area[i].yact != win->area[i].ysize)) {
pr_err("win[%d]->area[%d],not support scale\n",
win->id, i);
pr_err("xact=%d,yact=%d,xsize=%d,ysize=%d\n",
win->area[i].xact,win->area[i].yact,
win->area[i].xsize,win->area[i].ysize);
win->area[i].xsize = win->area[i].xact;
win->area[i].ysize = win->area[i].yact;
}
DBG(2, "fmt:%s:xsize:%d>>ysize:%d>>xpos:%d>>ypos:%d\n",
get_format_string(win->area[i].format, fmt),
win->area[i].xsize, win->area[i].ysize,
@@ -3119,7 +3136,23 @@ static int rk3368_lcdc_blank(struct rk_lcdc_driver *dev_drv,
static int rk3368_lcdc_get_win_state(struct rk_lcdc_driver *dev_drv, int win_id)
{
return 0;
struct lcdc_device *lcdc_dev =
container_of(dev_drv, struct lcdc_device, driver);
int win_status = 0;
if (win_id == 0)
win_status = lcdc_read_bit(lcdc_dev, WIN0_CTRL0, m_WIN0_EN);
else if (win_id == 1)
win_status = lcdc_read_bit(lcdc_dev, WIN1_CTRL0, m_WIN1_EN);
else if (win_id == 2)
win_status = lcdc_read_bit(lcdc_dev, WIN2_CTRL0, m_WIN2_EN);
else if (win_id == 3)
win_status = lcdc_read_bit(lcdc_dev, WIN3_CTRL0, m_WIN3_EN);
else if (win_id == 4)
win_status = lcdc_read_bit(lcdc_dev, HWC_CTRL0, m_HWC_EN);
else
pr_err("!!!%s,win_id :%d,unsupport!!!\n",__func__,win_id);
return win_status;
}
/*overlay will be do at regupdate*/

3
drivers/video/rockchip/lcdc/rk3368_lcdc.h
View File

@@ -1824,11 +1824,8 @@ static inline u32 lcdc_read_bit(struct lcdc_device *lcdc_dev,
u32 offset, u32 msk)
{
u32 v;
u32 *_pv = (u32 *)lcdc_dev->regsbak;
u32 _v = readl_relaxed(lcdc_dev->regs + offset);
_pv += (offset >> 2);
*_pv = _v;
_v &= msk;
v = (_v ? 1 : 0);
return v;