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emmc: optimizing emmc hs400 timing process
PD#148082: emmc: optimizing emmc hs400 timing process Change-Id: I0318dec3e0c89eef3a396b157ada97b2ef768f7f Signed-off-by: Long Yu <long.yu@amlogic.com>
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@@ -905,7 +905,7 @@ tunning:
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vctrl = readl(host->base + SD_EMMC_CFG);
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clk_div = clkc->div;
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clock = clk_rate / clk_div;/*200MHz, bus_clk */
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pdata->mmc->actual_clock = ctrl->ddr ?
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mmc->actual_clock = ctrl->ddr ?
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(clock / 2) : clock;/*100MHz in ddr */
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if (ctrl->ddr == 1) {
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@@ -1028,9 +1028,6 @@ tunning:
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readl(host->base + SD_EMMC_CLOCK_V3),
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readl(host->base + SD_EMMC_ADJUST_V3));
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kfree(blk_test);
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/* do not dynamical tuning for no emmc device */
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if ((pdata->is_in) && !aml_card_type_mmc(pdata))
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schedule_delayed_work(&pdata->retuning, 15*HZ);
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return ret;
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#endif
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return 0;
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