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drm/rockchip: vop3: add xmirror register define

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Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I3e6653efb208b53f7a858904b7babaf092a6841f
This commit is contained in:
Sandy Huang
2023-01-31 10:38:54 +08:00
committed by Huang Jiachai
parent 707da1d0cb
commit 390dee5bd8
1 changed files with 4 additions and 0 deletions
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4
drivers/gpu/drm/rockchip/rockchip_vop2_reg.c
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@@ -783,6 +783,7 @@ static const struct vop2_video_port_regs rk3528_vop_vp0_regs = {
.dsp_filed_pol = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 6),
.dsp_interlace = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 7),
.dsp_data_swap = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1f, 8),
.dsp_x_mir_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 13),
.post_dsp_out_r2y = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 15),
.pre_dither_down_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 16),
.dither_down_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 17),
@@ -856,6 +857,7 @@ static const struct vop2_video_port_regs rk3528_vop_vp1_regs = {
.dsp_filed_pol = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 6),
.dsp_interlace = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 7),
.dsp_data_swap = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1f, 8),
.dsp_x_mir_en = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 13),
.post_dsp_out_r2y = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 15),
.pre_dither_down_en = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 16),
.dither_down_en = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 17),
@@ -969,6 +971,7 @@ static const struct vop2_video_port_regs rk3562_vop_vp0_regs = {
.dsp_filed_pol = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 6),
.dsp_interlace = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 7),
.dsp_data_swap = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1f, 8),
.dsp_x_mir_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 13),
.post_dsp_out_r2y = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 15),
.pre_dither_down_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 16),
.dither_down_en = VOP_REG(RK3568_VP0_DSP_CTRL, 0x1, 17),
@@ -1036,6 +1039,7 @@ static const struct vop2_video_port_regs rk3562_vop_vp1_regs = {
.dsp_filed_pol = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 6),
.dsp_interlace = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 7),
.dsp_data_swap = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1f, 8),
.dsp_x_mir_en = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 13),
.post_dsp_out_r2y = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 15),
.pre_dither_down_en = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 16),
.dither_down_en = VOP_REG(RK3568_VP1_DSP_CTRL, 0x1, 17),