arm64: dts: rockchip: rk3588s: add usbdp phy device node

This adds USBDP combo PHY related nodes for RK3588S SoCs.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I838233adebc584a60f36cad76c01a9d1a075e8f3
This commit is contained in:
Frank Wang
2021-08-27 09:46:04 +08:00
committed by Tao Huang
parent 3530c21737
commit 392cd16600

View File

@@ -254,6 +254,16 @@
};
};
vo0_grf: syscon@fd5a6000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";
reg = <0x0 0xfd5a6000 0x0 0x2000>;
};
usb_grf: syscon@fd5ac000 {
compatible = "rockchip,rk3588-usb-grf", "syscon";
reg = <0x0 0xfd5ac000 0x0 0x4000>;
};
php_grf: syscon@fd5b0000 {
compatible = "rockchip,rk3588-php-grf", "syscon";
reg = <0x0 0xfd5b0000 0x0 0x1000>;
@@ -269,6 +279,11 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5c8000 0x0 0x4000>;
};
syssram: sram@fd600000 {
compatible = "mmio-sram";
reg = <0x0 0xfd600000 0x0 0x100000>;
@@ -1560,6 +1575,35 @@
arm,pl330-periph-burst;
};
usbdp_phy0: phy@fed80000 {
compatible = "rockchip,rk3588-usbdp-phy";
reg = <0x0 0xfed80000 0x0 0x10000>;
rockchip,usb-grf = <&usb_grf>;
rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
rockchip,vo-grf = <&vo0_grf>;
clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
<&cru CLK_USBDP_PHY0_IMMORTAL>,
<&cru PCLK_USBDPPHY0>;
clock-names = "refclk", "immortal", "pclk";
resets = <&cru SRST_USBDP_COMBO_PHY0_INIT>,
<&cru SRST_USBDP_COMBO_PHY0_CMN>,
<&cru SRST_USBDP_COMBO_PHY0_LANE>,
<&cru SRST_USBDP_COMBO_PHY0_PCS>,
<&cru SRST_P_USBDPPHY0>;
reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
status = "disabled";
usbdp_phy0_dp: dp-port {
#phy-cells = <0>;
status = "disabled";
};
usbdp_phy0_u3: u3-port {
#phy-cells = <0>;
status = "disabled";
};
};
combphy0_ps: phy@fee00000 {
compatible = "rockchip,rk3588-naneng-combphy";
reg = <0x0 0xfee00000 0x0 0x100>;