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arm64: dts: rockchip: rk3588s: add usbdp phy device node
This adds USBDP combo PHY related nodes for RK3588S SoCs. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Change-Id: I838233adebc584a60f36cad76c01a9d1a075e8f3
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@@ -254,6 +254,16 @@
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};
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};
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vo0_grf: syscon@fd5a6000 {
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compatible = "rockchip,rk3588-vo-grf", "syscon";
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reg = <0x0 0xfd5a6000 0x0 0x2000>;
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};
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usb_grf: syscon@fd5ac000 {
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compatible = "rockchip,rk3588-usb-grf", "syscon";
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reg = <0x0 0xfd5ac000 0x0 0x4000>;
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};
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php_grf: syscon@fd5b0000 {
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compatible = "rockchip,rk3588-php-grf", "syscon";
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reg = <0x0 0xfd5b0000 0x0 0x1000>;
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@@ -269,6 +279,11 @@
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reg = <0x0 0xfd5c4000 0x0 0x100>;
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};
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usbdpphy0_grf: syscon@fd5c8000 {
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compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
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reg = <0x0 0xfd5c8000 0x0 0x4000>;
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};
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syssram: sram@fd600000 {
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compatible = "mmio-sram";
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reg = <0x0 0xfd600000 0x0 0x100000>;
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@@ -1560,6 +1575,35 @@
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arm,pl330-periph-burst;
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};
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usbdp_phy0: phy@fed80000 {
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compatible = "rockchip,rk3588-usbdp-phy";
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reg = <0x0 0xfed80000 0x0 0x10000>;
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rockchip,usb-grf = <&usb_grf>;
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rockchip,usbdpphy-grf = <&usbdpphy0_grf>;
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rockchip,vo-grf = <&vo0_grf>;
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clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
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<&cru CLK_USBDP_PHY0_IMMORTAL>,
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<&cru PCLK_USBDPPHY0>;
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clock-names = "refclk", "immortal", "pclk";
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resets = <&cru SRST_USBDP_COMBO_PHY0_INIT>,
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<&cru SRST_USBDP_COMBO_PHY0_CMN>,
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<&cru SRST_USBDP_COMBO_PHY0_LANE>,
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<&cru SRST_USBDP_COMBO_PHY0_PCS>,
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<&cru SRST_P_USBDPPHY0>;
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reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
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status = "disabled";
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usbdp_phy0_dp: dp-port {
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#phy-cells = <0>;
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status = "disabled";
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};
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usbdp_phy0_u3: u3-port {
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#phy-cells = <0>;
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status = "disabled";
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};
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};
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combphy0_ps: phy@fee00000 {
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compatible = "rockchip,rk3588-naneng-combphy";
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reg = <0x0 0xfee00000 0x0 0x100>;
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