drm/i915: Extract PIPE_CONF_CHECK_RECT()

Deduplicate the drm_rect comparisons.

We also drop the redundant pch_pfit.enabled check since the
pch_pfit.dst rectanble will be zeroed anyway when the pfit
is not enabled.

v2: Document why we drop the enabled check (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220503182242.18797-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Ville Syrjälä
2022-05-03 21:22:22 +03:00
parent 0e5397d8c9
commit 3951270abf

View File

@@ -6092,6 +6092,13 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_I(name.crtc_vsync_end); \
} while (0)
#define PIPE_CONF_CHECK_RECT(name) do { \
PIPE_CONF_CHECK_I(name.x1); \
PIPE_CONF_CHECK_I(name.x2); \
PIPE_CONF_CHECK_I(name.y1); \
PIPE_CONF_CHECK_I(name.y2); \
} while (0)
/* This is required for BDW+ where there is only one set of registers for
* switching between high and low RR.
* This macro can be used whenever a comparison has to be made between one
@@ -6254,18 +6261,10 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(pch_pfit.force_thru);
if (!fastset) {
PIPE_CONF_CHECK_I(pipe_src.x1);
PIPE_CONF_CHECK_I(pipe_src.y1);
PIPE_CONF_CHECK_I(pipe_src.x2);
PIPE_CONF_CHECK_I(pipe_src.y2);
PIPE_CONF_CHECK_RECT(pipe_src);
PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
if (current_config->pch_pfit.enabled) {
PIPE_CONF_CHECK_I(pch_pfit.dst.x1);
PIPE_CONF_CHECK_I(pch_pfit.dst.y1);
PIPE_CONF_CHECK_I(pch_pfit.dst.x2);
PIPE_CONF_CHECK_I(pch_pfit.dst.y2);
}
PIPE_CONF_CHECK_RECT(pch_pfit.dst);
PIPE_CONF_CHECK_I(scaler_state.scaler_id);
PIPE_CONF_CHECK_CLOCK_FUZZY(pixel_rate);
@@ -6387,6 +6386,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
#undef PIPE_CONF_CHECK_CLOCK_FUZZY
#undef PIPE_CONF_CHECK_COLOR_LUT
#undef PIPE_CONF_CHECK_TIMINGS
#undef PIPE_CONF_CHECK_RECT
#undef PIPE_CONF_QUIRK
return ret;