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hdmitx: fix wrong 420 valid_mode [1/1]

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PD#SWPL-6896

Problem:
In the HF1-31 Iter 03 test, the Rx EDID's max tmds clock is 600MHz,
and it doesn't claim that it supports Y420 modes. But
echo 2160p60hz,420,8bit > /sys/class/amhdmitx/amhdmitx0/valid_mode
'cat valid_mode' will get 1.

Solution:
Add Y420 8bit check

Verify:
G12/U212

Change-Id: I0a128eb33aeb2b4bcbf253eff49e9c5186386af1
Signed-off-by: Zongdong Jiao <zongdong.jiao@amlogic.com>
This commit is contained in:
Zongdong Jiao
2019-04-12 16:58:08 +08:00
committed by Luan Yuan
parent fed72eb16b
commit 396ad38985
1 changed files with 25 additions and 0 deletions
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25
drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_edid.c
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@@ -2315,6 +2315,29 @@ const char *hdmitx_edid_vic_to_string(enum hdmi_vic vic)
return disp_str;
}
static bool is_rx_support_y420(struct hdmitx_dev *hdev)
{
enum hdmi_vic vic = HDMI_Unknown;
vic = hdmitx_edid_get_VIC(hdev, "2160p60hz420", 0);
if (vic != HDMI_Unknown)
return 1;
vic = hdmitx_edid_get_VIC(hdev, "2160p50hz420", 0);
if (vic != HDMI_Unknown)
return 1;
vic = hdmitx_edid_get_VIC(hdev, "smpte60hz420", 0);
if (vic != HDMI_Unknown)
return 1;
vic = hdmitx_edid_get_VIC(hdev, "smpte50hz420", 0);
if (vic != HDMI_Unknown)
return 1;
return 0;
}
/* For some TV's EDID, there maybe exist some information ambiguous.
* Such as EDID declears support 2160p60hz(Y444 8bit), but no valid
* Max_TMDS_Clock2 to indicate that it can support 5.94G signal.
@@ -2455,6 +2478,8 @@ bool hdmitx_edid_check_valid_mode(struct hdmitx_dev *hdev,
return valid;
}
if (para->cs == COLORSPACE_YUV420) {
if (!is_rx_support_y420(hdev))
return 0;
if (pRXCap->dc_30bit_420)
rx_y420_max_dc = COLORDEPTH_30B;
if (pRXCap->dc_36bit_420)