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storage: emmc: Set core_phase to 2 for HS200 mode [1/1]

Browse Source 
PD#TV-2112

Problem:
eMMC timing test failed on item tISU

Solution:
set core_phase to 2 for HS200 busmode

Verify:
TL1-T962X2_X301

Change-Id: I1025b6b6b66b2591b7a8faca68ff1852eeb9b85c
Signed-off-by: long yu <long.yu@amlogic.com>
This commit is contained in:
long yu
2019-01-11 14:55:35 +08:00
committed by Jianxin Pan
parent a00d72b176
commit 39a61a2bdb
1 changed files with 1 additions and 1 deletions
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2
drivers/amlogic/mmc/aml_sd_emmc.c
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@@ -3577,7 +3577,7 @@ static struct meson_mmc_data mmc_data_tl1 = {
.sdmmc.init.rx_phase = 0,
.sdmmc.hs.core_phase = 3,
.sdmmc.ddr.core_phase = 2,
.sdmmc.hs2.core_phase = 3,
.sdmmc.hs2.core_phase = 2,
.sdmmc.hs4.tx_delay = 0,
.sdmmc.sd_hs.core_phase = 2,
.sdmmc.sdr104.core_phase = 2,