shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 19:30:30 +09:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: rockchip: rk3588: Add gmac0 and gmac1 nodes at dtsi level

Browse Source 
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I53f1f378b9c524ddf6d1da7da6e2bf2d498162ad
This commit is contained in:
David Wu
2021-09-03 17:43:16 +08:00
committed by Tao Huang
parent 2627dcd2c9
commit 3b595992f2
2 changed files with 101 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

52
arch/arm64/boot/dts/rockchip/rk3588.dtsi
View File

@@ -6,6 +6,10 @@
#include "rk3588s.dtsi"
/ {
aliases {
ethernet0 = &gmac0;
};
usbdrd3_1: usbdrd3_1 {
compatible = "rockchip,rk3588-dwc3", "rockchip,rk3399-dwc3";
clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>,
@@ -174,6 +178,54 @@
status = "disabled";
};
gmac0: ethernet@fe1b0000 {
compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
reg = <0x0 0xfe1b0000 0x0 0x10000>;
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq";
rockchip,grf = <&sys_grf>;
rockchip,php_grf = <&php_grf>;
clocks = <&cru CLK_GMAC0>, <&cru ACLK_GMAC0>,
<&cru PCLK_GMAC0>, <&cru CLK_GMAC0_PTP_REF>;
clock-names = "stmmaceth", "aclk_mac",
"pclk_mac", "ptp_ref";
resets = <&cru SRST_A_GMAC0>;
reset-names = "stmmaceth";
snps,mixed-burst;
snps,tso;
snps,axi-config = <&gmac0_stmmac_axi_setup>;
snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
status = "disabled";
mdio0: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
gmac0_stmmac_axi_setup: stmmac-axi-config {
snps,wr_osr_lmt = <4>;
snps,rd_osr_lmt = <8>;
snps,blen = <0 0 0 0 16 8 4>;
};
gmac0_mtl_rx_setup: rx-queues-config {
snps,rx-queues-to-use = <2>;
queue0 {};
queue1 {};
};
gmac0_mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <2>;
queue0 {};
queue1 {};
};
};
sata1: sata@fe220000 {
compatible = "snps,dwc-ahci";
reg = <0 0xfe220000 0 0x1000>;

49
arch/arm64/boot/dts/rockchip/rk3588s.dtsi
View File

@@ -17,6 +17,7 @@
#size-cells = <2>;
aliases {
ethernet1 = &gmac1;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
@@ -1097,6 +1098,54 @@
status = "disabled";
};
gmac1: ethernet@fe1c0000 {
compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a";
reg = <0x0 0xfe1c0000 0x0 0x10000>;
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_wake_irq";
rockchip,grf = <&sys_grf>;
rockchip,php_grf = <&php_grf>;
clocks = <&cru CLK_GMAC1>, <&cru ACLK_GMAC1>,
<&cru PCLK_GMAC1>, <&cru CLK_GMAC1_PTP_REF>;
clock-names = "stmmaceth", "aclk_mac",
"pclk_mac", "ptp_ref";
resets = <&cru SRST_A_GMAC1>;
reset-names = "stmmaceth";
snps,mixed-burst;
snps,tso;
snps,axi-config = <&gmac1_stmmac_axi_setup>;
snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
status = "disabled";
mdio1: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <0x1>;
#size-cells = <0x0>;
};
gmac1_stmmac_axi_setup: stmmac-axi-config {
snps,wr_osr_lmt = <4>;
snps,rd_osr_lmt = <8>;
snps,blen = <0 0 0 0 16 8 4>;
};
gmac1_mtl_rx_setup: rx-queues-config {
snps,rx-queues-to-use = <2>;
queue0 {};
queue1 {};
};
gmac1_mtl_tx_setup: tx-queues-config {
snps,tx-queues-to-use = <2>;
queue0 {};
queue1 {};
};
};
sata0: sata@fe210000 {
compatible = "snps,dwc-ahci";
reg = <0 0xfe210000 0 0x1000>;